From 2c0286dba46526ee6c23b1f28af62a857dace704 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 28 Jun 2021 14:58:21 +0100 Subject: target/arm: Use asimd_imm_const for A64 decode The A64 AdvSIMD modified-immediate grouping uses almost the same constant encoding that A32 Neon does; reuse asimd_imm_const() (to which we add the AArch64-specific case for cmode 15 op 1) instead of reimplementing it all. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20210628135835.6690-5-peter.maydell@linaro.org --- target/arm/translate.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'target/arm/translate.h') diff --git a/target/arm/translate.h b/target/arm/translate.h index 6c8d5f6ede..e2f056c32c 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -540,7 +540,8 @@ static inline MemOp finalize_memop(DisasContext *s, MemOp opc) * VMVN and VBIC (when cmode < 14 && op == 1). * * The combination cmode == 15 op == 1 is a reserved encoding for AArch32; - * callers must catch this. + * callers must catch this; we return the 64-bit constant value defined + * for AArch64. * * cmode = 2,3,4,5,6,7,10,11,12,13 imm=0 was UNPREDICTABLE in v7A but * is either not unpredictable or merely CONSTRAINED UNPREDICTABLE in v8A; -- cgit v1.2.3