From 43722a6d4f0c92f7e7e1e291580039b0f9789df1 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 15 Aug 2019 09:46:43 +0100 Subject: target/arm: Introduce pc_curr MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a new field to retain the address of the instruction currently being translated. The 32-bit uses are all within subroutines used by a32 and t32. This will become less obvious when t16 support is merged with a32+t32, and having a clear definition will help. Convert aarch64 as well for consistency. Note that there is one instance of a pre-assert fprintf that used the wrong value for the address of the current instruction. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20190807045335.1361-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/arm/translate-a64.h') diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h index 9ab40872d8..9cd2b3d238 100644 --- a/target/arm/translate-a64.h +++ b/target/arm/translate-a64.h @@ -25,7 +25,7 @@ void unallocated_encoding(DisasContext *s); qemu_log_mask(LOG_UNIMP, \ "%s:%d: unsupported instruction encoding 0x%08x " \ "at pc=%016" PRIx64 "\n", \ - __FILE__, __LINE__, insn, s->pc - 4); \ + __FILE__, __LINE__, insn, s->pc_curr); \ unallocated_encoding(s); \ } while (0) -- cgit v1.2.3