From 6109aea2d954891027acba64a13f1f1c7463cfac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Thu, 1 Mar 2018 11:05:53 +0000 Subject: arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds the full range of half-precision floating point to integral instructions. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-id: 20180227143852.11175-18-alex.bennee@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper-a64.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'target/arm/helper-a64.c') diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 4d5ae96d8f..4fd28fdf48 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -745,3 +745,25 @@ uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp) int compare = float16_compare(f0, f1, fpst); return ADVSIMD_CMPRES(compare == float_relation_greater); } + +/* round to integral */ +float16 HELPER(advsimd_rinth_exact)(float16 x, void *fp_status) +{ + return float16_round_to_int(x, fp_status); +} + +float16 HELPER(advsimd_rinth)(float16 x, void *fp_status) +{ + int old_flags = get_float_exception_flags(fp_status), new_flags; + float16 ret; + + ret = float16_round_to_int(x, fp_status); + + /* Suppress any inexact exceptions the conversion produced */ + if (!(old_flags & float_flag_inexact)) { + new_flags = get_float_exception_flags(fp_status); + set_float_exception_flags(new_flags & ~float_flag_inexact, fp_status); + } + + return ret; +} -- cgit v1.2.3