From 2df581304193d70eaf0d22cf4cb4613f74b6e59b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Thu, 1 Mar 2018 11:05:53 +0000 Subject: arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This covers all the floating point convert operations. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-id: 20180227143852.11175-19-alex.bennee@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper-a64.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'target/arm/helper-a64.c') diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 4fd28fdf48..722fff2349 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -767,3 +767,35 @@ float16 HELPER(advsimd_rinth)(float16 x, void *fp_status) return ret; } + +/* + * Half-precision floating point conversion functions + * + * There are a multitude of conversion functions with various + * different rounding modes. This is dealt with by the calling code + * setting the mode appropriately before calling the helper. + */ + +uint32_t HELPER(advsimd_f16tosinth)(float16 a, void *fpstp) +{ + float_status *fpst = fpstp; + + /* Invalid if we are passed a NaN */ + if (float16_is_any_nan(a)) { + float_raise(float_flag_invalid, fpst); + return 0; + } + return float16_to_int16(a, fpst); +} + +uint32_t HELPER(advsimd_f16touinth)(float16 a, void *fpstp) +{ + float_status *fpst = fpstp; + + /* Invalid if we are passed a NaN */ + if (float16_is_any_nan(a)) { + float_raise(float_flag_invalid, fpst); + return 0; + } + return float16_to_uint16(a, fpst); +} -- cgit v1.2.3