From 6bea25631af92531027d3bf3ef972a4d51d62e7c Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 1 Mar 2019 12:05:01 -0800 Subject: target/arm: Implement ARMv8.5-FRINT Tested-by: Laurent Desnogues Signed-off-by: Richard Henderson Message-id: 20190301200501.16533-11-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/cpu.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'target/arm/cpu.h') diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a7aaec63d7..5f23c62132 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3476,6 +3476,11 @@ static inline bool isar_feature_aa64_predinv(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, SPECRES) != 0; } +static inline bool isar_feature_aa64_frint(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, FRINTTS) != 0; +} + static inline bool isar_feature_aa64_fp16(const ARMISARegisters *id) { /* We always set the AdvSIMD and FP fields identically wrt FP16. */ -- cgit v1.2.3