From 926c1b97895879b78ca14bca2831c08740ed1c38 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= Date: Tue, 12 Jan 2021 12:45:09 +0200 Subject: target/arm: Implement SCR_EL2.EEL2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds handling for the SCR_EL3.EEL2 bit. Signed-off-by: Rémi Denis-Courmont Message-id: 20210112104511.36576-17-remi.denis.courmont@huawei.com [PMM: Applied fixes for review issues noted by RTH: - check for FEATURE_AARCH64 before checking sel2 isar feature - correct the commit message subject line] Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/arm/cpu.c') diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4ae22b2086..40142ac141 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -480,7 +480,7 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, * masked from Secure state. The HCR and SCR settings * don't affect the masking logic, only the interrupt routing. */ - if (target_el == 3 || !secure) { + if (target_el == 3 || !secure || (env->cp15.scr_el3 & SCR_EEL2)) { unmasked = true; } } else { -- cgit v1.2.3