From 461aa6783eec27f209b026c6647fc7a83b2997cd Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 24 Aug 2015 08:56:45 -0700 Subject: target-tilegx: Handle v1shl, v1shru, v1shrs Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'target-tilegx/translate.c') diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 65b610e542..e70c3e5ab7 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -1077,12 +1077,22 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(V1MZ, 0, X1): case OE_RRR(V1SADAU, 0, X0): case OE_RRR(V1SADU, 0, X0): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1SHL, 0, X0): case OE_RRR(V1SHL, 0, X1): + gen_helper_v1shl(tdest, tsrca, tsrcb); + mnemonic = "v1shl"; + break; case OE_RRR(V1SHRS, 0, X0): case OE_RRR(V1SHRS, 0, X1): + gen_helper_v1shrs(tdest, tsrca, tsrcb); + mnemonic = "v1shrs"; + break; case OE_RRR(V1SHRU, 0, X0): case OE_RRR(V1SHRU, 0, X1): + gen_helper_v1shru(tdest, tsrca, tsrcb); + mnemonic = "v1shru"; + break; case OE_RRR(V1SUBUC, 0, X0): case OE_RRR(V1SUBUC, 0, X1): case OE_RRR(V1SUB, 0, X0): @@ -1199,6 +1209,7 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, const char *mnemonic; TCGMemOp memop; int i2, i3; + TCGv t0; switch (opext) { case OE(ADDI_OPCODE_Y0, 0, Y0): @@ -1401,7 +1412,11 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, break; case OE_SH(V1SHRSI, X0): case OE_SH(V1SHRSI, X1): - return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; + t0 = tcg_const_tl(imm & 7); + gen_helper_v1shrs(tdest, tsrca, t0); + tcg_temp_free(t0); + mnemonic = "v1shrsi"; + break; case OE_SH(V1SHRUI, X0): case OE_SH(V1SHRUI, X1): i2 = imm & 7; -- cgit v1.2.3