From f840fa995f88bc2bea7311f003e8de5ceb8ab276 Mon Sep 17 00:00:00 2001 From: Stefan Weil Date: Thu, 5 Jan 2012 13:11:48 +0100 Subject: target-sh4: Fix operands for fipr, ftrv instructions Coverity complained about right shifts of opcode (16, 18) which were larger than the size of opcode (16 bit). Using the correct shift values fixes this. Cc: Aurelien Jarno Signed-off-by: Stefan Weil Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'target-sh4/translate.c') diff --git a/target-sh4/translate.c b/target-sh4/translate.c index bad3577726..2ecb23671f 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1864,8 +1864,8 @@ static void _decode_opc(DisasContext * ctx) CHECK_FPU_ENABLED if ((ctx->fpscr & FPSCR_PR) == 0) { TCGv m, n; - m = tcg_const_i32((ctx->opcode >> 16) & 3); - n = tcg_const_i32((ctx->opcode >> 18) & 3); + m = tcg_const_i32((ctx->opcode >> 8) & 3); + n = tcg_const_i32((ctx->opcode >> 10) & 3); gen_helper_fipr(m, n); tcg_temp_free(m); tcg_temp_free(n); @@ -1877,7 +1877,7 @@ static void _decode_opc(DisasContext * ctx) if ((ctx->opcode & 0x0300) == 0x0100 && (ctx->fpscr & FPSCR_PR) == 0) { TCGv n; - n = tcg_const_i32((ctx->opcode >> 18) & 3); + n = tcg_const_i32((ctx->opcode >> 10) & 3); gen_helper_ftrv(n); tcg_temp_free(n); return; -- cgit v1.2.3