From f6c3ebcc3b117311389bac58cffc4ad7c3016e1c Mon Sep 17 00:00:00 2001 From: Alexey Kardashevskiy Date: Wed, 25 Jun 2014 17:41:50 +1000 Subject: target-ppc: Add support for POWER8 pvr 0x4D0000 At the moment QEMU knows about one version of POWER8 CPU with PVR 0x4B.0000. This CPU class is defined as "POWER8". The linux kernel names it as "POWER8E" which is different from the name QEMU uses. Now we get another version of POWER8 which is architecturally equivalent to POWER8E but has different PVR 0x4D.0000 so QEMU fails to find a PPC CPU class on these machines. The linux kernel names these CPUs as "POWER8". This renames the existing "POWER8" to "POWER8E" to be more precise and stay in sync with the linux kernel. This adds a new "POWER8" family which calls POWER8E class init function and defines own PVR mask (used to match a CPU class) and desc (used to create dynamic version-less CPU class). This does not change CPU class fw_name attribute as the host POWER8 firmware keeps using "PowerPC,POWER8" on both POWER8 and POWER8E. Signed-off-by: Alexey Kardashevskiy Signed-off-by: Alexander Graf --- target-ppc/translate_init.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) (limited to 'target-ppc/translate_init.c') diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 594f7ac8d1..a3bb336e16 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8189,16 +8189,16 @@ static void init_proc_POWER8(CPUPPCState *env) init_proc_book3s_64(env, BOOK3S_CPU_POWER8); } -POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) +POWERPC_FAMILY(POWER8E)(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); dc->fw_name = "PowerPC,POWER8"; - dc->desc = "POWER8"; + dc->desc = "POWER8E"; dc->props = powerpc_servercpu_properties; - pcc->pvr = CPU_POWERPC_POWER8_BASE; - pcc->pvr_mask = CPU_POWERPC_POWER8_MASK; + pcc->pvr = CPU_POWERPC_POWER8E_BASE; + pcc->pvr_mask = CPU_POWERPC_POWER8E_MASK; pcc->pcr_mask = PCR_COMPAT_2_05 | PCR_COMPAT_2_06; pcc->init_proc = init_proc_POWER8; pcc->check_pow = check_pow_nocheck; @@ -8252,6 +8252,18 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) pcc->l1_icache_size = 0x8000; pcc->interrupts_big_endian = ppc_cpu_interrupts_big_endian_lpcr; } + +POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); + + ppc_POWER8E_cpu_family_class_init(oc, data); + + dc->desc = "POWER8"; + pcc->pvr = CPU_POWERPC_POWER8_BASE; + pcc->pvr_mask = CPU_POWERPC_POWER8_MASK; +} #endif /* defined (TARGET_PPC64) */ -- cgit v1.2.3