From 01fe9a470c4c49a18c386f411278780dedb65ad6 Mon Sep 17 00:00:00 2001 From: Rajalakshmi Srinivasaraghavan Date: Tue, 6 Sep 2016 10:34:09 +0530 Subject: target-ppc: add vector bit permute doubleword instruction Add vbpermd instruction from ISA 3.0. Signed-off-by: Rajalakshmi Srinivasaraghavan Signed-off-by: David Gibson --- target-ppc/translate/vmx-impl.inc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'target-ppc/translate/vmx-impl.inc.c') diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c index 982feff046..cb8933080f 100644 --- a/target-ppc/translate/vmx-impl.inc.c +++ b/target-ppc/translate/vmx-impl.inc.c @@ -792,6 +792,7 @@ GEN_VXFORM_DUAL(vclzw, PPC_NONE, PPC2_ALTIVEC_207, \ vpopcntw, PPC_NONE, PPC2_ALTIVEC_207) GEN_VXFORM_DUAL(vclzd, PPC_NONE, PPC2_ALTIVEC_207, \ vpopcntd, PPC_NONE, PPC2_ALTIVEC_207) +GEN_VXFORM(vbpermd, 6, 23); GEN_VXFORM(vbpermq, 6, 21); GEN_VXFORM_NOA(vgbbd, 6, 20); GEN_VXFORM(vpmsumb, 4, 16) -- cgit v1.2.3