From 21a0b6ed1dd9f1d8e3d953954847776c8697bd99 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 25 Jan 2012 17:06:30 +0100 Subject: PPC: booke206: move avail check to tlbwe We can have TLBs that only support a single page size. This is defined by the absence of the AVAIL flag in TLBnCFG. If this is the case, we currently write invalid size info into the TLB, but override it on internal fault. Let's move the check over to tlbwe, so we don't have the AVAIL check in the hotter fault path. Signed-off-by: Alexander Graf --- target-ppc/op_helper.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'target-ppc/op_helper.c') diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index be4e539c2d..0d1206a649 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -4282,6 +4282,15 @@ void helper_booke206_tlbwe(void) tlb->mas7_3 = ((uint64_t)env->spr[SPR_BOOKE_MAS7] << 32) | env->spr[SPR_BOOKE_MAS3]; tlb->mas1 = env->spr[SPR_BOOKE_MAS1]; + + /* MAV 1.0 only */ + if (!(tlbncfg & TLBnCFG_AVAIL)) { + /* force !AVAIL TLB entries to correct page size */ + tlb->mas1 &= ~MAS1_TSIZE_MASK; + /* XXX can be configured in MMUCSR0 */ + tlb->mas1 |= (tlbncfg & TLBnCFG_MINSIZE) >> 12; + } + /* XXX needs to change when supporting 64-bit e500 */ tlb->mas2 = env->spr[SPR_BOOKE_MAS2] & 0xffffffff; -- cgit v1.2.3