From 4877866ee4fbd760c943577bb6d1eba489fb6c6e Mon Sep 17 00:00:00 2001 From: Petar Jovanovic Date: Thu, 23 May 2013 19:37:53 +0200 Subject: target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15 Multiplication of Q15 fractional halfword vectors was incorrect in the previous implementation of mipsdsp_rndq15_mul_q15_q15. It failed to take element signs into account. This change fixes it, and it adds a test case for it. The change also removes unnecessary cast in the function mipsdsp_mul_q15_q15_overflowflag21(). Signed-off-by: Petar Jovanovic Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-mips/dsp_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target-mips') diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index 4116de93c3..c718a786e1 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -390,7 +390,7 @@ static inline int32_t mipsdsp_mul_q15_q15_overflowflag21(uint16_t a, uint16_t b, temp = 0x7FFFFFFF; set_DSPControl_overflow_flag(1, 21, env); } else { - temp = ((int32_t)(int16_t)a * (int32_t)(int16_t)b) << 1; + temp = ((int16_t)a * (int16_t)b) << 1; } return temp; @@ -622,7 +622,7 @@ static inline int16_t mipsdsp_rndq15_mul_q15_q15(uint16_t a, uint16_t b, temp = 0x7FFF0000; set_DSPControl_overflow_flag(1, 21, env); } else { - temp = (a * b) << 1; + temp = ((int16_t)a * (int16_t)b) << 1; temp = temp + 0x00008000; } -- cgit v1.2.3