From 32188a03dae09c8a02bc72f26ece4a98183cc787 Mon Sep 17 00:00:00 2001 From: Nathan Froyd Date: Tue, 8 Dec 2009 08:06:23 -0800 Subject: target-mips: change interrupt bits to be mips16-aware We need to stash the operating mode into the low bit of the error PC and restore it on return from interrupts. Signed-off-by: Nathan Froyd Signed-off-by: Aurelien Jarno --- target-mips/op_helper.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'target-mips/op_helper.c') diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index be75af5e6e..cccfd8e07e 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -1684,14 +1684,24 @@ static void debug_post_eret (void) } } +static void set_pc (target_ulong error_pc) +{ + env->active_tc.PC = error_pc & ~(target_ulong)1; + if (error_pc & 1) { + env->hflags |= MIPS_HFLAG_M16; + } else { + env->hflags &= ~(MIPS_HFLAG_M16); + } +} + void helper_eret (void) { debug_pre_eret(); if (env->CP0_Status & (1 << CP0St_ERL)) { - env->active_tc.PC = env->CP0_ErrorEPC; + set_pc(env->CP0_ErrorEPC); env->CP0_Status &= ~(1 << CP0St_ERL); } else { - env->active_tc.PC = env->CP0_EPC; + set_pc(env->CP0_EPC); env->CP0_Status &= ~(1 << CP0St_EXL); } compute_hflags(env); @@ -1702,7 +1712,8 @@ void helper_eret (void) void helper_deret (void) { debug_pre_eret(); - env->active_tc.PC = env->CP0_DEPC; + set_pc(env->CP0_DEPC); + env->hflags &= MIPS_HFLAG_DM; compute_hflags(env); debug_post_eret(); -- cgit v1.2.3