From 3dd3a2b965a2d2f5b9c53ab86194b78a546a8fc5 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Wed, 18 Sep 2013 19:10:45 +0200 Subject: target-lm32: add breakpoint/watchpoint support This patch adds in-target breakpoint and watchpoint support. Signed-off-by: Michael Walle --- target-lm32/cpu.h | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) (limited to 'target-lm32/cpu.h') diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 101df8045c..18cf3488f7 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -163,8 +163,11 @@ struct CPULM32State { /* debug registers */ uint32_t dc; /* debug control */ - uint32_t bp[4]; /* breakpoint addresses */ - uint32_t wp[4]; /* watchpoint addresses */ + uint32_t bp[4]; /* breakpoints */ + uint32_t wp[4]; /* watchpoints */ + + CPUBreakpoint * cpu_breakpoint[4]; + CPUWatchpoint * cpu_watchpoint[4]; CPU_COMMON @@ -181,6 +184,19 @@ struct CPULM32State { }; +typedef enum { + LM32_WP_DISABLED = 0, + LM32_WP_READ, + LM32_WP_WRITE, + LM32_WP_READ_WRITE, +} lm32_wp_t; + +static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx) +{ + assert(idx < 4); + return (dc >> (idx+1)*2) & 0x3; +} + #include "cpu-qom.h" LM32CPU *cpu_lm32_init(const char *cpu_model); @@ -193,6 +209,13 @@ int cpu_lm32_signal_handler(int host_signum, void *pinfo, void lm32_cpu_list(FILE *f, fprintf_function cpu_fprintf); void lm32_translate_init(void); void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value); +void QEMU_NORETURN raise_exception(CPULM32State *env, int index); +void lm32_debug_excp_handler(CPULM32State *env); +void lm32_breakpoint_insert(CPULM32State *env, int index, target_ulong address); +void lm32_breakpoint_remove(CPULM32State *env, int index); +void lm32_watchpoint_insert(CPULM32State *env, int index, target_ulong address, + lm32_wp_t wp_type); +void lm32_watchpoint_remove(CPULM32State *env, int index); static inline CPULM32State *cpu_init(const char *cpu_model) { -- cgit v1.2.3