From 9055330ffbf5ca85f024c29874799d9c8bd17aa9 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Thu, 8 Oct 2015 17:10:27 -0300 Subject: target-i386: Ensure bit 10 on DR7 is never cleared Bit 10 of DR7 is documented as always set to 1, so ensure that's always the case. Reviewed-by: Richard Henderson Signed-off-by: Eduardo Habkost --- target-i386/bpt_helper.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'target-i386') diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c index 23ce828491..49472ea85b 100644 --- a/target-i386/bpt_helper.c +++ b/target-i386/bpt_helper.c @@ -85,6 +85,8 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7) target_ulong old_dr7 = env->dr[7]; int i; + new_dr7 |= DR7_FIXED_1; + /* If nothing is changing except the global/local enable bits, then we can make the change more efficient. */ if (((old_dr7 ^ new_dr7) & ~0xff) == 0) { -- cgit v1.2.3