From c1e0371442bf3a7e42ad53c2a3d816ed7099f81d Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 21 Jan 2016 14:15:09 +0000 Subject: target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode The architecture requires that for an exception return to AArch32 the low bits of ELR_ELx are ignored when the PC is set from them: * if returning to Thumb mode, ignore ELR_ELx[0] * if returning to ARM mode, ignore ELR_ELx[1:0] We were only squashing bit 0; also squash bit 1 if the SPSR T bit indicates this is a return to ARM code. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias --- target-arm/op_helper.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'target-arm') diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 40224a8dfa..a5ee65fe2f 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -738,7 +738,11 @@ void HELPER(exception_return)(CPUARMState *env) } aarch64_sync_64_to_32(env); - env->regs[15] = env->elr_el[cur_el] & ~0x1; + if (spsr & CPSR_T) { + env->regs[15] = env->elr_el[cur_el] & ~0x1; + } else { + env->regs[15] = env->elr_el[cur_el] & ~0x3; + } } else { env->aarch64 = 1; pstate_write(env, spsr); -- cgit v1.2.3