From 73fb3b764b076132fb269475c128a7e9dcb22ed6 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Tue, 27 May 2014 17:09:52 +0100 Subject: target-arm: A64: Add SP entries for EL2 and 3 Reviewed-by: Peter Crosthwaite Signed-off-by: Edgar E. Iglesias Message-id: 1400980132-25949-10-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- target-arm/cpu.h | 2 +- target-arm/machine.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'target-arm') diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 62d85ff780..ba1d495be5 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -163,7 +163,7 @@ typedef struct CPUARMState { uint64_t daif; /* exception masks, in the bits they are in in PSTATE */ uint64_t elr_el[2]; /* AArch64 exception link regs */ - uint64_t sp_el[2]; /* AArch64 banked stack pointers */ + uint64_t sp_el[4]; /* AArch64 banked stack pointers */ /* System control coprocessor (cp15) */ struct { diff --git a/target-arm/machine.c b/target-arm/machine.c index b0fa46ddea..7b18a90e9e 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -218,8 +218,8 @@ static int cpu_post_load(void *opaque, int version_id) const VMStateDescription vmstate_arm_cpu = { .name = "cpu", - .version_id = 17, - .minimum_version_id = 17, + .version_id = 18, + .minimum_version_id = 18, .pre_save = cpu_pre_save, .post_load = cpu_post_load, .fields = (VMStateField[]) { @@ -239,7 +239,7 @@ const VMStateDescription vmstate_arm_cpu = { VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5), VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5), VMSTATE_UINT64(env.elr_el[1], ARMCPU), - VMSTATE_UINT64_ARRAY(env.sp_el, ARMCPU, 2), + VMSTATE_UINT64_ARRAY(env.sp_el, ARMCPU, 4), /* The length-check must come before the arrays to avoid * incoming data possibly overflowing the array. */ -- cgit v1.2.3