From 49a661910c1374858602a3002b67115893673c25 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 13 Aug 2015 11:26:21 +0100 Subject: target-arm: Add debug check for mismatched cpreg resets It's easy to accidentally define two cpregs which both try to reset the same underlying state field (for instance a clash between an AArch64 EL3 definition and an AArch32 banked register definition). if the two definitions disagree about the reset value then the result is dependent on which one happened to be reached last in the hashtable enumeration. Add a consistency check to detect and assert in these cases: after reset, we run a second pass where we check that the reset operation doesn't change the value of the register. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Message-id: 1436797559-20835-1-git-send-email-peter.maydell@linaro.org --- target-arm/cpu.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'target-arm/cpu.h') diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 7346c5f9d6..ebca342e42 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1448,6 +1448,9 @@ static inline bool cp_access_ok(int current_el, return (ri->access >> ((current_el * 2) + isread)) & 1; } +/* Raw read of a coprocessor register (as needed for migration, etc) */ +uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri); + /** * write_list_to_cpustate * @cpu: ARMCPU -- cgit v1.2.3