From e0e7a45d7fa64563191d3723fc4a4570122e6e42 Mon Sep 17 00:00:00 2001 From: Xiao Guangrong Date: Mon, 4 Jun 2018 17:55:11 +0800 Subject: migration: fix counting xbzrle cache_miss_rate Sync up xbzrle_cache_miss_prev only after migration iteration goes forward Signed-off-by: Xiao Guangrong Message-Id: <20180604095520.8563-4-xiaoguangrong@tencent.com> Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Dr. David Alan Gilbert --- migration/ram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'migration') diff --git a/migration/ram.c b/migration/ram.c index e0d19305ee..d273a19699 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -1200,9 +1200,9 @@ static void migration_bitmap_sync(RAMState *rs) (double)(xbzrle_counters.cache_miss - rs->xbzrle_cache_miss_prev) / (rs->iterations - rs->iterations_prev); + rs->xbzrle_cache_miss_prev = xbzrle_counters.cache_miss; } rs->iterations_prev = rs->iterations; - rs->xbzrle_cache_miss_prev = xbzrle_counters.cache_miss; } /* reset period counters */ -- cgit v1.2.3