From 13514fc93e6b2ead6e984bcd104975b6b4f375e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 16 Dec 2020 12:14:00 +0100 Subject: target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the single ISA_MIPS32R6 definition to check if the Release 6 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R6 in few commits. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210104221154.3127610-11-f4bug@amsat.org> --- linux-user/mips/cpu_loop.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'linux-user/mips') diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index f0831379cc..e400166c58 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -385,8 +385,7 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) prog_req.fre &= interp_req.fre; bool cpu_has_mips_r2_r6 = env->insn_flags & ISA_MIPS32R2 || - env->insn_flags & ISA_MIPS32R6 || - env->insn_flags & ISA_MIPS64R6; + env->insn_flags & ISA_MIPS32R6; if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) { env->CP0_Config5 |= (1 << CP0C5_FRE); -- cgit v1.2.3