From 149a48f6e6ccedfa01307d45884aa480f5bf77c5 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:14 +0100 Subject: softfloat: Extend float_exception_flags to 16 bits MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We will shortly have more than 8 bits of exceptions. Repack the existing flags into low bits and reformat to hex. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20211119160502.17432-2-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat-types.h | 16 ++++++++-------- include/fpu/softfloat.h | 2 +- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 5bcbd041f7..65a43aff59 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -145,13 +145,13 @@ typedef enum __attribute__((__packed__)) { */ enum { - float_flag_invalid = 1, - float_flag_divbyzero = 4, - float_flag_overflow = 8, - float_flag_underflow = 16, - float_flag_inexact = 32, - float_flag_input_denormal = 64, - float_flag_output_denormal = 128 + float_flag_invalid = 0x0001, + float_flag_divbyzero = 0x0002, + float_flag_overflow = 0x0004, + float_flag_underflow = 0x0008, + float_flag_inexact = 0x0010, + float_flag_input_denormal = 0x0020, + float_flag_output_denormal = 0x0040, }; /* @@ -171,8 +171,8 @@ typedef enum __attribute__((__packed__)) { */ typedef struct float_status { + uint16_t float_exception_flags; FloatRoundMode float_rounding_mode; - uint8_t float_exception_flags; FloatX80RoundPrec floatx80_rounding_precision; bool tininess_before_rounding; /* should denormalised results go to zero and set the inexact flag? */ diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index a249991e61..0d3b407807 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -100,7 +100,7 @@ typedef enum { | Routine to raise any or all of the software IEC/IEEE floating-point | exception flags. *----------------------------------------------------------------------------*/ -static inline void float_raise(uint8_t flags, float_status *status) +static inline void float_raise(uint16_t flags, float_status *status) { status->float_exception_flags |= flags; } -- cgit v1.2.3 From ba11446c40903b9d97fb75a078d43fee6444d3b6 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:14 +0100 Subject: softfloat: Add flag specific to Inf - Inf MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PowerPC has this flag, and it's easier to compute it here than after the fact. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-3-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat-types.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 65a43aff59..eaa12e1e00 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -152,6 +152,7 @@ enum { float_flag_inexact = 0x0010, float_flag_input_denormal = 0x0020, float_flag_output_denormal = 0x0040, + float_flag_invalid_isi = 0x0080, /* inf - inf */ }; /* -- cgit v1.2.3 From bead3c9b0ff8efd652afb27923d8ab4458b3bbd9 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:14 +0100 Subject: softfloat: Add flag specific to Inf * 0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PowerPC has this flag, and it's easier to compute it here than after the fact. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-4-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat-types.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index eaa12e1e00..56b4cf7835 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -153,6 +153,7 @@ enum { float_flag_input_denormal = 0x0020, float_flag_output_denormal = 0x0040, float_flag_invalid_isi = 0x0080, /* inf - inf */ + float_flag_invalid_imz = 0x0100, /* inf * 0 */ }; /* -- cgit v1.2.3 From 10cc964030fca459591d9353571f3b1b4e1b5aec Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:14 +0100 Subject: softfloat: Add flags specific to Inf / Inf and 0 / 0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PowerPC has these flags, and it's easier to compute them here than after the fact. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-5-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat-types.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 56b4cf7835..5a9671e564 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -154,6 +154,8 @@ enum { float_flag_output_denormal = 0x0040, float_flag_invalid_isi = 0x0080, /* inf - inf */ float_flag_invalid_imz = 0x0100, /* inf * 0 */ + float_flag_invalid_idi = 0x0200, /* inf / inf */ + float_flag_invalid_zdz = 0x0400, /* 0 / 0 */ }; /* -- cgit v1.2.3 From f8718aab8950c2c88c72b002aa0ba60caabfee36 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:14 +0100 Subject: softfloat: Add flag specific to sqrt(-x) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PowerPC has this flag, and it's easier to compute it here than after the fact. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-6-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat-types.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 5a9671e564..33224b5f22 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -156,6 +156,7 @@ enum { float_flag_invalid_imz = 0x0100, /* inf * 0 */ float_flag_invalid_idi = 0x0200, /* inf / inf */ float_flag_invalid_zdz = 0x0400, /* 0 / 0 */ + float_flag_invalid_sqrt = 0x0800, /* sqrt(-x) */ }; /* -- cgit v1.2.3 From 81254b02eb2a551d7794d542cbdff03e8349355e Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:14 +0100 Subject: softfloat: Add flag specific to convert non-nan to int MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PowerPC has this flag, and it's easier to compute it here than after the fact. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-7-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat-types.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 33224b5f22..9ca50e930b 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -157,6 +157,7 @@ enum { float_flag_invalid_idi = 0x0200, /* inf / inf */ float_flag_invalid_zdz = 0x0400, /* 0 / 0 */ float_flag_invalid_sqrt = 0x0800, /* sqrt(-x) */ + float_flag_invalid_cvti = 0x1000, /* non-nan to integer */ }; /* -- cgit v1.2.3 From e706d4455b8d54252b11fc504c56df060151cb89 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:14 +0100 Subject: softfloat: Add flag specific to signaling nans MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PowerPC has this flag, and it's easier to compute it here than after the fact. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-8-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat-types.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 9ca50e930b..8abd9ab4ec 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -158,6 +158,7 @@ enum { float_flag_invalid_zdz = 0x0400, /* 0 / 0 */ float_flag_invalid_sqrt = 0x0800, /* sqrt(-x) */ float_flag_invalid_cvti = 0x1000, /* non-nan to integer */ + float_flag_invalid_snan = 0x2000, /* any operand was snan */ }; /* -- cgit v1.2.3 From 42636fb923de0598104858d886c6f0acdbeb21b5 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 17 Dec 2021 17:57:15 +0100 Subject: softfloat: Add float64r32 arithmetic routines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These variants take a float64 as input, compute the result to infinite precision (as we do with FloatParts), round the result to the precision and dynamic range of float32, and then return the result in the format of float64. This is the operation PowerPC requires for its float32 operations. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-28-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- include/fpu/softfloat.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 0d3b407807..d34b2c44d2 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -908,6 +908,18 @@ static inline bool float64_unordered_quiet(float64 a, float64 b, *----------------------------------------------------------------------------*/ float64 float64_default_nan(float_status *status); +/*---------------------------------------------------------------------------- +| Software IEC/IEEE double-precision operations, rounding to single precision, +| returning a result in double precision, with only one rounding step. +*----------------------------------------------------------------------------*/ + +float64 float64r32_add(float64, float64, float_status *status); +float64 float64r32_sub(float64, float64, float_status *status); +float64 float64r32_mul(float64, float64, float_status *status); +float64 float64r32_div(float64, float64, float_status *status); +float64 float64r32_muladd(float64, float64, float64, int, float_status *status); +float64 float64r32_sqrt(float64, float_status *status); + /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -- cgit v1.2.3 From 2c4d3a501e55bb90f90577b2e3f0181dc89efd42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Fri, 17 Dec 2021 17:57:19 +0100 Subject: ppc/pnv: Introduce a "chip" property under PHB3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This change will help us move the mapping of XSCOM regions under the PHB3 realize routine, which will be necessary for user created PHB3 devices. Reviewed-by: Daniel Henrique Barboza Reviewed-by: Frederic Barrat Signed-off-by: Cédric Le Goater Message-Id: <20211213132830.108372-3-clg@kaod.org> Signed-off-by: Cédric Le Goater --- include/hw/pci-host/pnv_phb3.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index e2a2e36245..e9c13e6bd8 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -16,6 +16,7 @@ #include "qom/object.h" typedef struct PnvPHB3 PnvPHB3; +typedef struct PnvChip PnvChip; /* * PHB3 XICS Source for MSIs @@ -157,6 +158,8 @@ struct PnvPHB3 { PnvPHB3RootPort root; QLIST_HEAD(, PnvPhb3DMASpace) dma_spaces; + + PnvChip *chip; }; uint64_t pnv_phb3_reg_read(void *opaque, hwaddr off, unsigned size); -- cgit v1.2.3 From 422fd92e613ab6b5239538bf2dc1202eb9d3f0f5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Fri, 17 Dec 2021 17:57:19 +0100 Subject: ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit POWER9 processor comes with 3 PHB4 PEC (PCI Express Controller) and each PEC can have several PHBs : * PEC0 provides 1 PHB (PHB0) * PEC1 provides 2 PHBs (PHB1 and PHB2) * PEC2 provides 3 PHBs (PHB3, PHB4 and PHB5) A num_pecs class attribute represents better the logic units of the POWER9 chip. Use that instead of num_phbs which fits POWER8 chips. This will ease adding support for user created devices. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater Message-Id: <20211213132830.108372-8-clg@kaod.org> Signed-off-by: Cédric Le Goater --- include/hw/ppc/pnv.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index aa08d79d24..c781525277 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -53,6 +53,7 @@ struct PnvChip { PnvCore **cores; uint32_t num_phbs; + uint32_t num_pecs; MemoryRegion xscom_mmio; MemoryRegion xscom; @@ -136,6 +137,7 @@ struct PnvChipClass { uint64_t chip_cfam_id; uint64_t cores_mask; uint32_t num_phbs; + uint32_t num_pecs; DeviceRealize parent_realize; -- cgit v1.2.3 From 12060cbd3fd42e2a263c473829f5872c89dc71d7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Fri, 17 Dec 2021 17:57:19 +0100 Subject: ppc/pnv: Introduce version and device_id class atributes for PHB4 devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It prepares ground for PHB5 which has different values. Reviewed-by: Daniel Henrique Barboza Reviewed-by: Frederic Barrat Signed-off-by: Cédric Le Goater Message-Id: <20211213132830.108372-9-clg@kaod.org> Signed-off-by: Cédric Le Goater --- include/hw/pci-host/pnv_phb4.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 27556ae534..b286423364 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -219,6 +219,8 @@ struct PnvPhb4PecClass { int compat_size; const char *stk_compat; int stk_compat_size; + uint64_t version; + uint64_t device_id; }; #endif /* PCI_HOST_PNV_PHB4_H */ -- cgit v1.2.3 From 6f43d2551fba2569e67c8c1ac4e8768a566738eb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Fri, 17 Dec 2021 17:57:19 +0100 Subject: ppc/pnv: Introduce a "chip" property under the PHB4 model MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit And check the PEC index using the chip class. Reviewed-by: Daniel Henrique Barboza Reviewed-by: Frederic Barrat Signed-off-by: Cédric Le Goater Message-Id: <20211213132830.108372-10-clg@kaod.org> Signed-off-by: Cédric Le Goater --- include/hw/pci-host/pnv_phb4.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index b286423364..8a585c9a42 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -205,6 +205,8 @@ struct PnvPhb4PecState { #define PHB4_PEC_MAX_STACKS 3 uint32_t num_stacks; PnvPhb4PecStack stacks[PHB4_PEC_MAX_STACKS]; + + PnvChip *chip; }; -- cgit v1.2.3 From cf0ee6955cc2f7f256e44c4f8198f69aae6ea39c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Fri, 17 Dec 2021 17:57:19 +0100 Subject: ppc/pnv: Introduce a num_stack class attribute MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Each PEC device of the POWER9 chip has a predefined number of stacks, equivalent of a root port complex: PEC0 -> 1 stack PEC1 -> 2 stacks PEC2 -> 3 stacks Introduce a class attribute to hold these values and remove the "num-stacks" property. Reviewed-by: Daniel Henrique Barboza Reviewed-by: Frederic Barrat Signed-off-by: Cédric Le Goater Message-Id: <20211213132830.108372-11-clg@kaod.org> Signed-off-by: Cédric Le Goater --- include/hw/pci-host/pnv_phb4.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 8a585c9a42..60de3031a6 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -223,6 +223,7 @@ struct PnvPhb4PecClass { int stk_compat_size; uint64_t version; uint64_t device_id; + const uint32_t *num_stacks; }; #endif /* PCI_HOST_PNV_PHB4_H */ -- cgit v1.2.3