From 264495f9486ac17ea0275b0de1510b5de32d142b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 20 May 2023 07:45:08 +0200 Subject: hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit QOM type names are usually defined as TYPE_FOO. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-4-philmd@linaro.org> Signed-off-by: Alistair Francis --- include/hw/riscv/opentitan.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index c40b05052a..fd70226ed8 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -53,6 +53,8 @@ struct LowRISCIbexSoCState { MemoryRegion flash_alias; }; +#define TYPE_OPENTITAN_MACHINE "opentitan" + typedef struct OpenTitanState { /*< private >*/ SysBusDevice parent_obj; -- cgit v1.2.3 From 8696b74a6fed86a9d2bd7e947d0490c2459a8aa6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 20 May 2023 07:45:09 +0200 Subject: hw/riscv/opentitan: Explicit machine type definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Expand the DEFINE_MACHINE() macro, converting the class_init() handler. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-5-philmd@linaro.org> Signed-off-by: Alistair Francis --- include/hw/riscv/opentitan.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index fd70226ed8..806ff73528 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -24,6 +24,7 @@ #include "hw/char/ibex_uart.h" #include "hw/timer/ibex_timer.h" #include "hw/ssi/ibex_spi_host.h" +#include "hw/boards.h" #include "qom/object.h" #define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc" @@ -53,7 +54,7 @@ struct LowRISCIbexSoCState { MemoryRegion flash_alias; }; -#define TYPE_OPENTITAN_MACHINE "opentitan" +#define TYPE_OPENTITAN_MACHINE MACHINE_TYPE_NAME("opentitan") typedef struct OpenTitanState { /*< private >*/ -- cgit v1.2.3 From a828ba9d46972e32c135f386dd08c02aa7eb8f1d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 20 May 2023 07:45:10 +0200 Subject: hw/riscv/opentitan: Correct OpenTitanState parent type/size MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit OpenTitanState is the 'machine' (or 'board') state: it isn't a SysBus device, but inherits from the MachineState type. Correct the instance size. Doing so we avoid leaking an OpenTitanState pointer in opentitan_machine_init(). Fixes: fe0fe4735e ("riscv: Initial commit of OpenTitan machine") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230520054510.68822-6-philmd@linaro.org> Signed-off-by: Alistair Francis --- include/hw/riscv/opentitan.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 806ff73528..609473d07b 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -55,10 +55,11 @@ struct LowRISCIbexSoCState { }; #define TYPE_OPENTITAN_MACHINE MACHINE_TYPE_NAME("opentitan") +OBJECT_DECLARE_SIMPLE_TYPE(OpenTitanState, OPENTITAN_MACHINE) typedef struct OpenTitanState { /*< private >*/ - SysBusDevice parent_obj; + MachineState parent_obj; /*< public >*/ LowRISCIbexSoCState soc; -- cgit v1.2.3 From d02eb5bcdeb3d3890404c1cc688cbcfcbd3ca65b Mon Sep 17 00:00:00 2001 From: Weiwei Li Date: Tue, 23 May 2023 17:35:32 +0800 Subject: disas: Change type of disassemble_info.target_info to pointer Use pointer to pass more information of target to disasembler, such as pass cpu.cfg related information in following commits. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-Id: <20230523093539.203909-2-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis --- include/disas/dis-asm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h index 2f6f91c2ee..2324f6b1a4 100644 --- a/include/disas/dis-asm.h +++ b/include/disas/dis-asm.h @@ -397,7 +397,7 @@ typedef struct disassemble_info { char * disassembler_options; /* Field intended to be used by targets in any way they deem suitable. */ - int64_t target_info; + void *target_info; /* Options for Capstone disassembly. */ int cap_arch; -- cgit v1.2.3 From b84694defbcc675a42bc35c4eb28cac590a5414b Mon Sep 17 00:00:00 2001 From: Ivan Klokov Date: Mon, 10 Apr 2023 15:44:50 +0300 Subject: util/log: Add vector registers to log Added QEMU option 'vpu' to log vector extension registers such as gpr\fpu. Signed-off-by: Ivan Klokov Reviewed-by: Alistair Francis Message-Id: <20230410124451.15929-2-ivan.klokov@syntacore.com> Signed-off-by: Alistair Francis --- include/hw/core/cpu.h | 2 ++ include/qemu/log.h | 1 + 2 files changed, 3 insertions(+) (limited to 'include') diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 383456d1b3..d84fbccaab 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -544,11 +544,13 @@ GuestPanicInformation *cpu_get_crash_info(CPUState *cpu); * @CPU_DUMP_CODE: * @CPU_DUMP_FPU: dump FPU register state, not just integer * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state + * @CPU_DUMP_VPU: dump VPU registers */ enum CPUDumpFlags { CPU_DUMP_CODE = 0x00010000, CPU_DUMP_FPU = 0x00020000, CPU_DUMP_CCOP = 0x00040000, + CPU_DUMP_VPU = 0x00080000, }; /** diff --git a/include/qemu/log.h b/include/qemu/log.h index c5643d8dd5..df59bfabcd 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -35,6 +35,7 @@ bool qemu_log_separate(void); /* LOG_STRACE is used for user-mode strace logging. */ #define LOG_STRACE (1 << 19) #define LOG_PER_THREAD (1 << 20) +#define CPU_LOG_TB_VPU (1 << 21) /* Lock/unlock output. */ -- cgit v1.2.3