From 81e94379f75c40b77d577c6bff2d7e23c9904ccf Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 6 Sep 2019 09:20:18 -0700 Subject: riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet In the past we did not have a model for PRCI, hence two handcrafted clock nodes ("/soc/ethclk" and "/soc/uartclk") were created for the purpose of supplying hard-coded clock frequencies. But now since we have added the PRCI support in QEMU, we don't need them any more. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- include/hw/riscv/sifive_u.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include/hw/riscv/sifive_u.h') diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 5270851aa2..e4df298c23 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -77,8 +77,7 @@ enum { enum { SIFIVE_U_CLOCK_FREQ = 1000000000, SIFIVE_U_HFCLK_FREQ = 33333333, - SIFIVE_U_RTCCLK_FREQ = 1000000, - SIFIVE_U_GEM_CLOCK_FREQ = 125000000 + SIFIVE_U_RTCCLK_FREQ = 1000000 }; #define SIFIVE_U_MANAGEMENT_CPU_COUNT 1 -- cgit v1.2.3