From ba1ba5cca3962a9cc400c713c736b4fb8db1f38e Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 13 Sep 2017 18:04:57 +0200 Subject: arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit there are 2 use cases to deal with: 1: fixed CPU models per board/soc 2: boards with user configurable cpu_model and fallback to default cpu_model if user hasn't specified one explicitly For the 1st drop intermediate cpu_model parsing and use const cpu type directly, which replaces: typename = object_class_get_name( cpu_class_by_name(TYPE_ARM_CPU, cpu_model)) object_new(typename) with object_new(FOO_CPU_TYPE_NAME) or cpu_generic_init(BASE_CPU_TYPE, "my cpu model") with cpu_create(FOO_CPU_TYPE_NAME) as result 1st use case doesn't have to invoke not necessary translation and not needed code is removed. For the 2nd 1: set default cpu type with MachineClass::default_cpu_type and 2: use generic cpu_model parsing that done before machine_init() is run and: 2.1: drop custom cpu_model parsing where pattern is: typename = object_class_get_name( cpu_class_by_name(TYPE_ARM_CPU, cpu_model)) [parse_features(typename, cpu_model, &err) ] 2.2: or replace cpu_generic_init() which does what 2.1 does + create_cpu(typename) with just create_cpu(machine->cpu_type) as result cpu_name -> cpu_type translation is done using generic machine code one including parsing optional features if supported/present (removes a bunch of duplicated cpu_model parsing code) and default cpu type is defined in an uniform way within machine_class_init callbacks instead of adhoc places in boadr's machine_init code. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Message-Id: <1505318697-77161-6-git-send-email-imammedo@redhat.com> Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Eduardo Habkost --- include/hw/arm/armv7m.h | 4 ++-- include/hw/arm/aspeed_soc.h | 2 +- include/hw/arm/stm32f205_soc.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include/hw/arm') diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index 10eb058027..9ad316c76e 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -35,7 +35,7 @@ typedef struct { /* ARMv7M container object. * + Unnamed GPIO input lines: external IRQ lines for the NVIC * + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ - * + Property "cpu-model": CPU model to instantiate + * + Property "cpu-type": CPU type to instantiate * + Property "num-irq": number of external IRQ lines * + Property "memory": MemoryRegion defining the physical address space * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal @@ -55,7 +55,7 @@ typedef struct ARMv7MState { MemoryRegion container; /* Properties */ - char *cpu_model; + char *cpu_type; /* MemoryRegion the board provides to us (with its devices, RAM, etc) */ MemoryRegion *board_memory; } ARMv7MState; diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 0b88baaad0..f26914a2b9 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -49,7 +49,7 @@ typedef struct AspeedSoCState { typedef struct AspeedSoCInfo { const char *name; - const char *cpu_model; + const char *cpu_type; uint32_t silicon_rev; hwaddr sdram_base; uint64_t sram_size; diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h index e2dce1122e..922a733f88 100644 --- a/include/hw/arm/stm32f205_soc.h +++ b/include/hw/arm/stm32f205_soc.h @@ -52,7 +52,7 @@ typedef struct STM32F205State { SysBusDevice parent_obj; /*< public >*/ - char *cpu_model; + char *cpu_type; ARMv7MState armv7m; -- cgit v1.2.3