From bd62c13ea89b8ae004aa08802144f1f0cada0ddb Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Wed, 16 Dec 2020 10:22:43 -0800 Subject: hw/riscv: spike: Remove compile time XLEN checks Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Message-id: ac75037dd58061486de421a0fcd9ac8a92014607.1608142916.git.alistair.francis@wdc.com --- hw/riscv/spike.c | 45 ++++++++++++++++++++++++--------------------- 1 file changed, 24 insertions(+), 21 deletions(-) (limited to 'hw') diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 875f371f0f..3e47e4579d 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -43,17 +43,6 @@ #include "sysemu/qtest.h" #include "sysemu/sysemu.h" -/* - * Not like other RISC-V machines that use plain binary bios images, - * keeping ELF files here was intentional because BIN files don't work - * for the Spike machine as HTIF emulation depends on ELF parsing. - */ -#if defined(TARGET_RISCV32) -# define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.elf" -#else -# define BIOS_FILENAME "opensbi-riscv64-generic-fw_dynamic.elf" -#endif - static const struct MemmapEntry { hwaddr base; hwaddr size; @@ -64,7 +53,7 @@ static const struct MemmapEntry { }; static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap, - uint64_t mem_size, const char *cmdline) + uint64_t mem_size, const char *cmdline, bool is_32_bit) { void *fdt; uint64_t addr, size; @@ -115,11 +104,11 @@ static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap, cpu_name = g_strdup_printf("/cpus/cpu@%d", s->soc[socket].hartid_base + cpu); qemu_fdt_add_subnode(fdt, cpu_name); -#if defined(TARGET_RISCV32) - qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32"); -#else - qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48"); -#endif + if (is_32_bit) { + qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32"); + } else { + qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48"); + } name = riscv_isa_string(&s->soc[socket].harts[cpu]); qemu_fdt_setprop_string(fdt, cpu_name, "riscv,isa", name); g_free(name); @@ -254,7 +243,8 @@ static void spike_board_init(MachineState *machine) main_mem); /* create device tree */ - create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline); + create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline, + riscv_is_32_bit(machine)); /* boot rom */ memory_region_init_rom(mask_rom, NULL, "riscv.spike.mrom", @@ -262,9 +252,22 @@ static void spike_board_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base, mask_rom); - firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, - memmap[SPIKE_DRAM].base, - htif_symbol_callback); + /* + * Not like other RISC-V machines that use plain binary bios images, + * keeping ELF files here was intentional because BIN files don't work + * for the Spike machine as HTIF emulation depends on ELF parsing. + */ + if (riscv_is_32_bit(machine)) { + firmware_end_addr = riscv_find_and_load_firmware(machine, + "opensbi-riscv32-generic-fw_dynamic.elf", + memmap[SPIKE_DRAM].base, + htif_symbol_callback); + } else { + firmware_end_addr = riscv_find_and_load_firmware(machine, + "opensbi-riscv64-generic-fw_dynamic.elf", + memmap[SPIKE_DRAM].base, + htif_symbol_callback); + } if (machine->kernel_filename) { kernel_start_addr = riscv_calc_kernel_start_addr(machine, -- cgit v1.2.3