From 4dbb9ed3263e0f48282a2fc3d05099ba63e5b0e2 Mon Sep 17 00:00:00 2001
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Date: Wed, 3 Apr 2013 14:04:09 +1000
Subject: xilinx_axienet: pump events as appropriate

When the conditions blocking receiving are cleared, check for buffered rx
packets.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---
 hw/xilinx_axienet.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'hw')

diff --git a/hw/xilinx_axienet.c b/hw/xilinx_axienet.c
index 5785290224..07c4badd98 100644
--- a/hw/xilinx_axienet.c
+++ b/hw/xilinx_axienet.c
@@ -516,6 +516,8 @@ static void enet_write(void *opaque, hwaddr addr,
             s->rcw[addr & 1] = value;
             if ((addr & 1) && value & RCW1_RST) {
                 axienet_rx_reset(s);
+            } else {
+                qemu_flush_queued_packets(qemu_get_queue(s->nic));
             }
             break;
 
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