From 3d9bada2408329269424628a3be6340c6c28de0e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Tue, 25 Sep 2018 14:02:33 +0100 Subject: hw/arm/aspeed: change the FMC flash model of the AST2500 evb MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The AST2500 evb is shipped with a W25Q256 which has a non volatile bit to make the chip operate in 4 Byte address mode at power up. This should be an interesting feature to model as it will exercise a bit more the SMC controllers and MMIO execution at boot time. Signed-off-by: Cédric Le Goater Message-id: 20180921161939.822-3-clg@kaod.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/aspeed.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index bb9590f1ae..f2d64e4551 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -105,7 +105,7 @@ static const AspeedBoardConfig aspeed_boards[] = { [AST2500_EVB] = { .soc_name = "ast2500-a1", .hw_strap1 = AST2500_EVB_HW_STRAP1, - .fmc_model = "n25q256a", + .fmc_model = "w25q256", .spi_model = "mx25l25635e", .num_cs = 1, .i2c_init = ast2500_evb_i2c_init, -- cgit v1.2.3