From 2b42f31eae2c24507c38326b3534cd9292e7dfcf Mon Sep 17 00:00:00 2001 From: Helge Deller Date: Fri, 15 Mar 2019 17:41:30 +0100 Subject: Update seabios-hppa to latest upstream This patch fixes two issues in the hppa/parisc emulation: 1. The CPU HPA was wrong in the sense that we had negative module offsets in the firmware-internal module table (which we ignored up to now). Get it correct by changing the CPU HPA to 0xfffb0000 which is greater than the DINO_HPA of 0xfff80000. This change requires the seabios-firmware update. 2. Sven noticed that the FPU register cr10 is only able to reference up to 8 FPUs, so let's reduce the maximum amount of SMP CPUs too. Signed-off-by: Helge Deller Message-Id: <20190315164130.GA7800@ls3530> Signed-off-by: Richard Henderson --- hw/hppa/hppa_hardware.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw') diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h index 2c61b1f77c..af2f5ee2bd 100644 --- a/hw/hppa/hppa_hardware.h +++ b/hw/hppa/hppa_hardware.h @@ -19,7 +19,7 @@ #define LASI_PS2KBD_HPA 0xffd08000 #define LASI_PS2MOU_HPA 0xffd08100 #define LASI_GFX_HPA 0xf8000000 -#define CPU_HPA 0xfff10000 +#define CPU_HPA 0xfffb0000 #define MEMORY_HPA 0xfffbf000 #define PCI_HPA DINO_HPA /* PCI bus */ @@ -36,5 +36,5 @@ #define PORT_SERIAL1 (DINO_UART_HPA + 0x800) #define PORT_SERIAL2 (LASI_UART_HPA + 0x800) -#define HPPA_MAX_CPUS 32 /* max. number of SMP CPUs */ +#define HPPA_MAX_CPUS 8 /* max. number of SMP CPUs */ #define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */ -- cgit v1.2.3