From c90e6e37083a7ca3b53838429591196db31fec0e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 30 Jan 2024 11:12:16 +0100 Subject: hw/sparc/leon3: Remove duplicate code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit b04d989054 ("SPARC: Emulation of Leon3") the main_cpu_reset() handler sets both pc/npc when the CPU is reset, after the machine is realized. It is pointless to set it in leon3_generic_hw_init(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Clément Chigot Message-Id: <20240130113102.6732-3-philmd@linaro.org> --- hw/sparc/leon3.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 2dfb742566..1ae9a37583 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -343,8 +343,6 @@ static void leon3_generic_hw_init(MachineState *machine) bootloader_entry = memory_region_get_ram_ptr(prom); write_bootloader(env, bootloader_entry, entry); - env->pc = LEON3_PROM_OFFSET; - env->npc = LEON3_PROM_OFFSET + 4; reset_info->entry = LEON3_PROM_OFFSET; } } -- cgit v1.2.3 From a7b3c3797e81872084fa533dc3faaebfd6434d79 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 15 Feb 2024 14:23:16 +0100 Subject: hw/sparc/leon3: Remove unused 'env' argument of write_bootloader() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 'CPUSPARCState *env' argument is unused, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Message-Id: <20240215132824.67363-2-philmd@linaro.org> --- hw/sparc/leon3.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 1ae9a37583..5c670b92db 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -94,8 +94,7 @@ static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) * state (eg: initialized by the bootloader). This little code reproduces * this behavior. */ -static void write_bootloader(CPUSPARCState *env, uint8_t *base, - hwaddr kernel_addr) +static void write_bootloader(uint8_t *base, hwaddr kernel_addr) { uint32_t *p = (uint32_t *) base; @@ -342,7 +341,7 @@ static void leon3_generic_hw_init(MachineState *machine) uint8_t *bootloader_entry; bootloader_entry = memory_region_get_ram_ptr(prom); - write_bootloader(env, bootloader_entry, entry); + write_bootloader(bootloader_entry, entry); reset_info->entry = LEON3_PROM_OFFSET; } } -- cgit v1.2.3 From 047521050a857600838b2d4be4cde42d52cac4f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 15 Feb 2024 14:24:12 +0100 Subject: hw/sparc/leon3: Have write_bootloader() take a void pointer argument MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Directly use the void pointer argument returned by memory_region_get_ram_ptr(). Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240215132824.67363-3-philmd@linaro.org> --- hw/sparc/leon3.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 5c670b92db..fa4fbe4b30 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -94,9 +94,9 @@ static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) * state (eg: initialized by the bootloader). This little code reproduces * this behavior. */ -static void write_bootloader(uint8_t *base, hwaddr kernel_addr) +static void write_bootloader(void *ptr, hwaddr kernel_addr) { - uint32_t *p = (uint32_t *) base; + uint32_t *p = ptr; /* Initialize the UARTs */ /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ @@ -338,10 +338,7 @@ static void leon3_generic_hw_init(MachineState *machine) * the machine in an initialized state through a little * bootloader. */ - uint8_t *bootloader_entry; - - bootloader_entry = memory_region_get_ram_ptr(prom); - write_bootloader(bootloader_entry, entry); + write_bootloader(memory_region_get_ram_ptr(prom), entry); reset_info->entry = LEON3_PROM_OFFSET; } } -- cgit v1.2.3 From f432962e72de4d820b11294ae3e51f2aa5643265 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:39 +0100 Subject: hw/sparc/grlib: split out the headers for each peripherals MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Split out the headers for each peripherals and move them in their right hardware directory. Update Copyright and add SPDX-License-Identifier at the same time. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240131085047.18458-2-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index fa4fbe4b30..e80b9410d4 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -1,7 +1,9 @@ /* * QEMU Leon3 System Emulator * - * Copyright (c) 2010-2019 AdaCore + * SPDX-License-Identifier: MIT + * + * Copyright (c) 2010-2024 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -40,7 +42,9 @@ #include "elf.h" #include "trace.h" -#include "hw/sparc/grlib.h" +#include "hw/timer/grlib_gptimer.h" +#include "hw/char/grlib_uart.h" +#include "hw/intc/grlib_irqmp.h" #include "hw/misc/grlib_ahb_apb_pnp.h" /* Default system clock. */ -- cgit v1.2.3 From 6bf147854395f39fe45abebe40529bf7f023aeb9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:40 +0100 Subject: hw/intc/grlib_irqmp: add ncpus property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds a "ncpus" property to the "grlib-irqmp" device to be used later, this required a little refactoring of how we initialize the device (ie: use realize instead of init). Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240131085047.18458-3-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index e80b9410d4..bc6a85be9c 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -264,11 +264,11 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ irqmpdev = qdev_new(TYPE_GRLIB_IRQMP); + sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, env, "pil", 1); qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = irqmpdev; env->qemu_irq_ack = leon3_irq_manager; -- cgit v1.2.3 From 0fa5cd4a6016c0dc13c2882f63b58787cf3283bb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:42 +0100 Subject: hw/intc/grlib_irqmp: implements multicore irq MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now there is an ncpus property, use it in order to deliver the IRQ to multiple CPU. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240131085047.18458-5-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index bc6a85be9c..3f86b74ba4 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -169,7 +169,8 @@ static void leon3_cache_control_int(CPUSPARCState *env) static void leon3_irq_ack(CPUSPARCState *env, int intno) { - grlib_irqmp_ack(env->irq_manager, intno); + /* No SMP support yet, only CPU #0 available so far. */ + grlib_irqmp_ack(env->irq_manager, 0, intno); } /* -- cgit v1.2.3 From 92688a91c35852e7492d718d7872a6bc725ddff4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:44 +0100 Subject: hw/sparc/leon3: remove SP initialization MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the doc (see §4.2.15 in [1]), the reset operation should not impact %SP. [1] https://gaisler.com/doc/gr712rc-usermanual.pdf Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240131085047.18458-7-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 3f86b74ba4..46fc1e783a 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -69,7 +69,6 @@ typedef struct ResetData { SPARCCPU *cpu; uint32_t entry; /* save kernel entry in case of reset */ - target_ulong sp; /* initial stack pointer */ } ResetData; static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) @@ -135,7 +134,6 @@ static void main_cpu_reset(void *opaque) cpu->halted = 0; env->pc = s->entry; env->npc = s->entry + 4; - env->regbase[6] = s->sp; } static void leon3_cache_control_int(CPUSPARCState *env) @@ -246,7 +244,6 @@ static void leon3_generic_hw_init(MachineState *machine) /* Reset data */ reset_info = g_new0(ResetData, 1); reset_info->cpu = cpu; - reset_info->sp = LEON3_RAM_OFFSET + ram_size; qemu_register_reset(main_cpu_reset, reset_info); ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); -- cgit v1.2.3 From d65aba8286e40bc02f26f19e53fa20c9396d02e7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:45 +0100 Subject: hw/sparc/leon3: implement multiprocessor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This allows to register more than one CPU on the leon3_generic machine. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Message-ID: <20240131085047.18458-8-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 93 +++++++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 68 insertions(+), 25 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 46fc1e783a..1637900162 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -54,6 +54,8 @@ #define LEON3_PROM_OFFSET (0x00000000) #define LEON3_RAM_OFFSET (0x40000000) +#define MAX_CPUS 4 + #define LEON3_UART_OFFSET (0x80000100) #define LEON3_UART_IRQ (3) @@ -67,8 +69,11 @@ #define LEON3_AHB_PNP_OFFSET (0xFFFFF000) typedef struct ResetData { - SPARCCPU *cpu; - uint32_t entry; /* save kernel entry in case of reset */ + struct CPUResetData { + int id; + SPARCCPU *cpu; + } info[MAX_CPUS]; + uint32_t entry; /* save kernel entry in case of reset */ } ResetData; static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) @@ -123,17 +128,19 @@ static void write_bootloader(void *ptr, hwaddr kernel_addr) stl_p(p++, 0x01000000); /* nop */ } -static void main_cpu_reset(void *opaque) +static void leon3_cpu_reset(void *opaque) { - ResetData *s = (ResetData *)opaque; - CPUState *cpu = CPU(s->cpu); - CPUSPARCState *env = &s->cpu->env; + struct CPUResetData *info = (struct CPUResetData *) opaque; + int id = info->id; + ResetData *s = (ResetData *)DO_UPCAST(ResetData, info[id], info); + CPUState *cpu = CPU(s->info[id].cpu); + CPUSPARCState *env = cpu_env(cpu); cpu_reset(cpu); - cpu->halted = 0; - env->pc = s->entry; - env->npc = s->entry + 4; + cpu->halted = cpu->cpu_index != 0; + env->pc = s->entry; + env->npc = s->entry + 4; } static void leon3_cache_control_int(CPUSPARCState *env) @@ -167,8 +174,8 @@ static void leon3_cache_control_int(CPUSPARCState *env) static void leon3_irq_ack(CPUSPARCState *env, int intno) { - /* No SMP support yet, only CPU #0 available so far. */ - grlib_irqmp_ack(env->irq_manager, 0, intno); + CPUState *cpu = CPU(env_cpu(env)); + grlib_irqmp_ack(env->irq_manager, cpu->cpu_index, intno); } /* @@ -210,6 +217,19 @@ static void leon3_set_pil_in(void *opaque, int n, int level) } } +static void leon3_start_cpu_async_work(CPUState *cpu, run_on_cpu_data data) +{ + cpu->halted = 0; +} + +static void leon3_start_cpu(void *opaque, int n, int level) +{ + CPUState *cs = CPU(opaque); + + assert(level == 1); + async_run_on_cpu(cs, leon3_start_cpu_async_work, RUN_ON_CPU_NULL); +} + static void leon3_irq_manager(CPUSPARCState *env, int intno) { leon3_irq_ack(env, intno); @@ -235,16 +255,20 @@ static void leon3_generic_hw_init(MachineState *machine) AHBPnp *ahb_pnp; APBPnp *apb_pnp; - /* Init CPU */ - cpu = SPARC_CPU(cpu_create(machine->cpu_type)); - env = &cpu->env; + reset_info = g_malloc0(sizeof(ResetData)); - cpu_sparc_set_id(env, 0); + for (i = 0; i < machine->smp.cpus; i++) { + /* Init CPU */ + cpu = SPARC_CPU(cpu_create(machine->cpu_type)); + env = &cpu->env; - /* Reset data */ - reset_info = g_new0(ResetData, 1); - reset_info->cpu = cpu; - qemu_register_reset(main_cpu_reset, reset_info); + cpu_sparc_set_id(env, i); + + /* Reset data */ + reset_info->info[i].id = i; + reset_info->info[i].cpu = cpu; + qemu_register_reset(leon3_cpu_reset, &reset_info->info[i]); + } ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal); @@ -262,14 +286,28 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ irqmpdev = qdev_new(TYPE_GRLIB_IRQMP); + object_property_set_int(OBJECT(irqmpdev), "ncpus", machine->smp.cpus, + &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); - qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, - env, "pil", 1); - qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0, - qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); + + for (i = 0; i < machine->smp.cpus; i++) { + cpu = reset_info->info[i].cpu; + env = &cpu->env; + qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_start_cpu, + cpu, "start_cpu", 1); + qdev_connect_gpio_out_named(irqmpdev, "grlib-start-cpu", i, + qdev_get_gpio_in_named(DEVICE(cpu), + "start_cpu", 0)); + qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, + env, "pil", 1); + qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", i, + qdev_get_gpio_in_named(DEVICE(cpu), + "pil", 0)); + env->irq_manager = irqmpdev; + env->qemu_irq_ack = leon3_irq_manager; + } + sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET); - env->irq_manager = irqmpdev; - env->qemu_irq_ack = leon3_irq_manager; grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, 2, 0, GRLIB_APBIO_AREA); @@ -342,6 +380,10 @@ static void leon3_generic_hw_init(MachineState *machine) */ write_bootloader(memory_region_get_ram_ptr(prom), entry); reset_info->entry = LEON3_PROM_OFFSET; + for (i = 0; i < machine->smp.cpus; i++) { + reset_info->info[i].cpu->env.pc = LEON3_PROM_OFFSET; + reset_info->info[i].cpu->env.npc = LEON3_PROM_OFFSET + 4; + } } } @@ -380,6 +422,7 @@ static void leon3_generic_machine_init(MachineClass *mc) mc->init = leon3_generic_hw_init; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); mc->default_ram_id = "leon3.ram"; + mc->max_cpus = MAX_CPUS; } DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) -- cgit v1.2.3 From 56bd9678ef553498274f1d29ebb2839f220bce6d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:46 +0100 Subject: hw/sparc/leon3: check cpu_id in the tiny bootloader MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that SMP is possible, the asr17 must be checked in the little boot code or the secondary CPU will reinitialize the Timer and the Uart. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240131085047.18458-9-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 1637900162..bea84f3ad6 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -99,12 +99,26 @@ static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) /* * When loading a kernel in RAM the machine is expected to be in a different - * state (eg: initialized by the bootloader). This little code reproduces - * this behavior. + * state (eg: initialized by the bootloader). This little code reproduces + * this behavior. Also this code can be executed by the secondary cpus as + * well since it looks at the %asr17 register before doing any + * initialization, it allows to use the same reset address for all the + * cpus. */ static void write_bootloader(void *ptr, hwaddr kernel_addr) { uint32_t *p = ptr; + uint32_t *sec_cpu_branch_p = NULL; + + /* If we are running on a secondary CPU, jump directly to the kernel. */ + + stl_p(p++, 0x85444000); /* rd %asr17, %g2 */ + stl_p(p++, 0x8530a01c); /* srl %g2, 0x1c, %g2 */ + stl_p(p++, 0x80908000); /* tst %g2 */ + /* Filled below. */ + sec_cpu_branch_p = p; + stl_p(p++, 0x0BADC0DE); /* bne xxx */ + stl_p(p++, 0x01000000); /* nop */ /* Initialize the UARTs */ /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ @@ -118,6 +132,10 @@ static void write_bootloader(void *ptr, hwaddr kernel_addr) /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ p = gen_store_u32(p, 0x80000318, 3); + /* Now, the relative branch above can be computed. */ + stl_p(sec_cpu_branch_p, 0x12800000 + + (p - sec_cpu_branch_p)); + /* JUMP to the entry point */ stl_p(p++, 0x82100000); /* mov %g0, %g1 */ stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); -- cgit v1.2.3 From 5c7127ee1ce1a4fefc13a12da12fb738b2b9174c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 13:44:36 +0100 Subject: hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By passing a DeviceState context to a QDev IRQ handler, we can simplify and use qdev_init_gpio_in_named() instead of qdev_init_gpio_in_named_with_opaque(). Suggested-by: Mark Cave-Ayland Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20240215144623.76233-2-philmd@linaro.org> --- hw/sparc/leon3.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index bea84f3ad6..a15f90e142 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -202,9 +202,10 @@ static void leon3_irq_ack(CPUSPARCState *env, int intno) */ static void leon3_set_pil_in(void *opaque, int n, int level) { - CPUSPARCState *env = opaque; + DeviceState *cpu = opaque; + CPUState *cs = CPU(cpu); + CPUSPARCState *env = cpu_env(cs); uint32_t pil_in = level; - CPUState *cs; assert(env != NULL); @@ -220,7 +221,6 @@ static void leon3_set_pil_in(void *opaque, int n, int level) env->interrupt_index = TT_EXTINT | i; if (old_interrupt != env->interrupt_index) { - cs = env_cpu(env); trace_leon3_set_irq(i); cpu_interrupt(cs, CPU_INTERRUPT_HARD); } @@ -228,7 +228,6 @@ static void leon3_set_pil_in(void *opaque, int n, int level) } } } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { - cs = env_cpu(env); trace_leon3_reset_irq(env->interrupt_index & 15); env->interrupt_index = 0; cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); @@ -316,8 +315,7 @@ static void leon3_generic_hw_init(MachineState *machine) qdev_connect_gpio_out_named(irqmpdev, "grlib-start-cpu", i, qdev_get_gpio_in_named(DEVICE(cpu), "start_cpu", 0)); - qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, - env, "pil", 1); + qdev_init_gpio_in_named(DEVICE(cpu), leon3_set_pil_in, "pil", 1); qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", i, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); -- cgit v1.2.3 From 08507399ab4d7a77c5a1b398eb37a06a2ebebd01 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 15 Feb 2024 15:33:50 +0100 Subject: hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By passing a DeviceState context to a QDev IRQ handler, we can simplify and use qdev_init_gpio_in_named() instead of qdev_init_gpio_in_named_with_opaque(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20240215144623.76233-3-philmd@linaro.org> --- hw/sparc/leon3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index a15f90e142..44fca1487d 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -241,7 +241,8 @@ static void leon3_start_cpu_async_work(CPUState *cpu, run_on_cpu_data data) static void leon3_start_cpu(void *opaque, int n, int level) { - CPUState *cs = CPU(opaque); + DeviceState *cpu = opaque; + CPUState *cs = CPU(cpu); assert(level == 1); async_run_on_cpu(cs, leon3_start_cpu_async_work, RUN_ON_CPU_NULL); @@ -310,8 +311,7 @@ static void leon3_generic_hw_init(MachineState *machine) for (i = 0; i < machine->smp.cpus; i++) { cpu = reset_info->info[i].cpu; env = &cpu->env; - qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_start_cpu, - cpu, "start_cpu", 1); + qdev_init_gpio_in_named(DEVICE(cpu), leon3_start_cpu, "start_cpu", 1); qdev_connect_gpio_out_named(irqmpdev, "grlib-start-cpu", i, qdev_get_gpio_in_named(DEVICE(cpu), "start_cpu", 0)); -- cgit v1.2.3 From 0f0554c6fa1785f4f432992e4446becc75a7bbd9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 7 Feb 2024 21:44:20 +0100 Subject: hw/sparc/leon3: Initialize GPIO before realizing CPU devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Inline cpu_create() in order to call qdev_init_gpio_in_named() before the CPU is realized. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Mark Cave-Ayland Message-Id: <20240215144623.76233-4-philmd@linaro.org> --- hw/sparc/leon3.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'hw/sparc/leon3.c') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 44fca1487d..4873b59b6c 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -277,7 +277,10 @@ static void leon3_generic_hw_init(MachineState *machine) for (i = 0; i < machine->smp.cpus; i++) { /* Init CPU */ - cpu = SPARC_CPU(cpu_create(machine->cpu_type)); + cpu = SPARC_CPU(object_new(machine->cpu_type)); + qdev_init_gpio_in_named(DEVICE(cpu), leon3_start_cpu, "start_cpu", 1); + qdev_init_gpio_in_named(DEVICE(cpu), leon3_set_pil_in, "pil", 1); + qdev_realize(DEVICE(cpu), NULL, &error_fatal); env = &cpu->env; cpu_sparc_set_id(env, i); @@ -311,11 +314,9 @@ static void leon3_generic_hw_init(MachineState *machine) for (i = 0; i < machine->smp.cpus; i++) { cpu = reset_info->info[i].cpu; env = &cpu->env; - qdev_init_gpio_in_named(DEVICE(cpu), leon3_start_cpu, "start_cpu", 1); qdev_connect_gpio_out_named(irqmpdev, "grlib-start-cpu", i, qdev_get_gpio_in_named(DEVICE(cpu), "start_cpu", 0)); - qdev_init_gpio_in_named(DEVICE(cpu), leon3_set_pil_in, "pil", 1); qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", i, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); -- cgit v1.2.3