From f1c0cff8a28ac25f48ecaea672eb3d68250bb3c4 Mon Sep 17 00:00:00 2001 From: Michael Tokarev Date: Fri, 14 Jul 2023 14:27:04 +0300 Subject: hw/pci: spelling fixes Signed-off-by: Michael Tokarev Reviewed-by: Peter Maydell --- hw/pci-host/designware.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw/pci-host/designware.c') diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 388d252ee2..6f5442f108 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -488,7 +488,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) /* * If no inbound iATU windows are configured, HW defaults to - * letting inbound TLPs to pass in. We emulate that by exlicitly + * letting inbound TLPs to pass in. We emulate that by explicitly * configuring first inbound window to cover all of target's * address space. * @@ -503,7 +503,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) &designware_pci_host_msi_ops, root, "pcie-msi", 0x4); /* - * We initially place MSI interrupt I/O region a adress 0 and + * We initially place MSI interrupt I/O region at address 0 and * disable it. It'll be later moved to correct offset and enabled * in designware_pcie_root_update_msi_mapping() as a part of * initialization done by guest OS -- cgit v1.2.3