From 2a952feb8393209634d31d546e202d916e09da06 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Sun, 28 Aug 2011 16:22:19 +0000 Subject: omap_gpmc: Support NAND devices Support accesses to NAND devices, both by mapping them into the GPMC address space, and via the NAND_COMMAND, NAND_ADDRESS and NAND_DATA GPMC registers. Signed-off-by: Peter Maydell --- hw/omap.h | 1 + 1 file changed, 1 insertion(+) (limited to 'hw/omap.h') diff --git a/hw/omap.h b/hw/omap.h index 8509c82c5b..2018636e0e 100644 --- a/hw/omap.h +++ b/hw/omap.h @@ -122,6 +122,7 @@ struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu, target_phys_addr_t base, qemu_irq irq); void omap_gpmc_reset(struct omap_gpmc_s *s); void omap_gpmc_attach(struct omap_gpmc_s *s, int cs, MemoryRegion *iomem); +void omap_gpmc_attach_nand(struct omap_gpmc_s *s, int cs, DeviceState *nand); /* * Common IRQ numbers for level 1 interrupt handler -- cgit v1.2.3