From 6bf6f3a1d1e6d288c3abac40001aa30153b07404 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Wed, 9 Jan 2019 16:15:32 +0100 Subject: ppc/xive: fix remaining XiveFabric names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Cédric Le Goater Reviewed-by: Greg Kurz Signed-off-by: David Gibson --- hw/intc/xive.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'hw/intc') diff --git a/hw/intc/xive.c b/hw/intc/xive.c index a3cb0cf0e3..7f567a57d2 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -1576,9 +1576,9 @@ static const TypeInfo xive_end_source_info = { }; /* - * XIVE Fabric + * XIVE Notifier */ -static const TypeInfo xive_fabric_info = { +static const TypeInfo xive_notifier_info = { .name = TYPE_XIVE_NOTIFIER, .parent = TYPE_INTERFACE, .class_size = sizeof(XiveNotifierClass), @@ -1587,7 +1587,7 @@ static const TypeInfo xive_fabric_info = { static void xive_register_types(void) { type_register_static(&xive_source_info); - type_register_static(&xive_fabric_info); + type_register_static(&xive_notifier_info); type_register_static(&xive_router_info); type_register_static(&xive_end_source_info); type_register_static(&xive_tctx_info); -- cgit v1.2.3 From 40a5056c4130efc60ab0639e93d6d0c509326e8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Thu, 17 Jan 2019 08:53:24 +0100 Subject: xive: add a get_tctx() method to the XiveRouter MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It provides a mean to retrieve the XiveTCTX of a CPU. This will become necessary with future changes which move the interrupt presenter object pointers under the PowerPCCPU machine_data. The PowerNV machine has an extra requirement on TIMA accesses that this new method addresses. The machine can perform indirect loads and stores on the TIMA on behalf of another CPU. The PIR being defined in the controller registers, we need a way to peek in the controller model to find the PIR value. The XiveTCTX is moved above the XiveRouter definition to avoid forward typedef declarations. Signed-off-by: Cédric Le Goater Reviewed-by: Greg Kurz Signed-off-by: David Gibson --- hw/intc/spapr_xive.c | 8 ++++++++ hw/intc/xive.c | 16 ++++++++++------ 2 files changed, 18 insertions(+), 6 deletions(-) (limited to 'hw/intc') diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index d391177ab8..136d872f16 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -390,6 +390,13 @@ static int spapr_xive_write_nvt(XiveRouter *xrtr, uint8_t nvt_blk, g_assert_not_reached(); } +static XiveTCTX *spapr_xive_get_tctx(XiveRouter *xrtr, CPUState *cs) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + + return cpu->tctx; +} + static const VMStateDescription vmstate_spapr_xive_end = { .name = TYPE_SPAPR_XIVE "/end", .version_id = 1, @@ -454,6 +461,7 @@ static void spapr_xive_class_init(ObjectClass *klass, void *data) xrc->write_end = spapr_xive_write_end; xrc->get_nvt = spapr_xive_get_nvt; xrc->write_nvt = spapr_xive_write_nvt; + xrc->get_tctx = spapr_xive_get_tctx; } static const TypeInfo spapr_xive_info = { diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 7f567a57d2..2e9b8efd43 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -320,8 +320,7 @@ static const XiveTmOp *xive_tm_find_op(hwaddr offset, unsigned size, bool write) static void xive_tm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - PowerPCCPU *cpu = POWERPC_CPU(current_cpu); - XiveTCTX *tctx = cpu->tctx; + XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu); const XiveTmOp *xto; /* @@ -359,8 +358,7 @@ static void xive_tm_write(void *opaque, hwaddr offset, static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) { - PowerPCCPU *cpu = POWERPC_CPU(current_cpu); - XiveTCTX *tctx = cpu->tctx; + XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu); const XiveTmOp *xto; /* @@ -1107,6 +1105,13 @@ int xive_router_write_nvt(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx, return xrc->write_nvt(xrtr, nvt_blk, nvt_idx, nvt, word_number); } +XiveTCTX *xive_router_get_tctx(XiveRouter *xrtr, CPUState *cs) +{ + XiveRouterClass *xrc = XIVE_ROUTER_GET_CLASS(xrtr); + + return xrc->get_tctx(xrtr, cs); +} + /* * The thread context register words are in big-endian format. */ @@ -1182,8 +1187,7 @@ static bool xive_presenter_match(XiveRouter *xrtr, uint8_t format, */ CPU_FOREACH(cs) { - PowerPCCPU *cpu = POWERPC_CPU(cs); - XiveTCTX *tctx = cpu->tctx; + XiveTCTX *tctx = xive_router_get_tctx(xrtr, cs); int ring; /* -- cgit v1.2.3 From a28b9a5a8db6a650dbad5811f33615c361c72151 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Thu, 17 Jan 2019 08:53:26 +0100 Subject: spapr: move the interrupt presenters under machine_data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Next step is to remove them from under the PowerPCCPU Signed-off-by: Cédric Le Goater Reviewed-by: Greg Kurz Signed-off-by: David Gibson --- hw/intc/spapr_xive.c | 3 ++- hw/intc/xics_spapr.c | 11 ++++++----- 2 files changed, 8 insertions(+), 6 deletions(-) (limited to 'hw/intc') diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 136d872f16..a0f5ff9294 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -16,6 +16,7 @@ #include "monitor/monitor.h" #include "hw/ppc/fdt.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/spapr_xive.h" #include "hw/ppc/xive.h" #include "hw/ppc/xive_regs.h" @@ -394,7 +395,7 @@ static XiveTCTX *spapr_xive_get_tctx(XiveRouter *xrtr, CPUState *cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - return cpu->tctx; + return spapr_cpu_state(cpu)->tctx; } static const VMStateDescription vmstate_spapr_xive_end = { diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index de6cc15b64..e2d8b38183 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -31,6 +31,7 @@ #include "trace.h" #include "qemu/timer.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/xics.h" #include "hw/ppc/xics_spapr.h" #include "hw/ppc/fdt.h" @@ -45,7 +46,7 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState *spapr, { target_ulong cppr = args[0]; - icp_set_cppr(cpu->icp, cppr); + icp_set_cppr(spapr_cpu_state(cpu)->icp, cppr); return H_SUCCESS; } @@ -66,7 +67,7 @@ static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr, static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { - uint32_t xirr = icp_accept(cpu->icp); + uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp); args[0] = xirr; return H_SUCCESS; @@ -75,7 +76,7 @@ static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr, static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { - uint32_t xirr = icp_accept(cpu->icp); + uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp); args[0] = xirr; args[1] = cpu_get_host_ticks(); @@ -87,7 +88,7 @@ static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineState *spapr, { target_ulong xirr = args[0]; - icp_eoi(cpu->icp, xirr); + icp_eoi(spapr_cpu_state(cpu)->icp, xirr); return H_SUCCESS; } @@ -95,7 +96,7 @@ static target_ulong h_ipoll(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { uint32_t mfrr; - uint32_t xirr = icp_ipoll(cpu->icp, &mfrr); + uint32_t xirr = icp_ipoll(spapr_cpu_state(cpu)->icp, &mfrr); args[0] = xirr; args[1] = mfrr; -- cgit v1.2.3