From 4ca8dabdb8b58349c309cfd9624d3f96172a752b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 13 Dec 2019 11:50:57 +0100 Subject: hw/i386/pc: Convert DPRINTF() to trace events MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert the deprecated DPRINTF() macro to trace events. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- hw/i386/pc.c | 19 +++++-------------- hw/i386/trace-events | 6 ++++++ 2 files changed, 11 insertions(+), 14 deletions(-) (limited to 'hw/i386') diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e330a916f6..d3075e709c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -91,16 +91,7 @@ #include "config-devices.h" #include "e820_memory_layout.h" #include "fw_cfg.h" - -/* debug PC/ISA interrupts */ -//#define DEBUG_IRQ - -#ifdef DEBUG_IRQ -#define DPRINTF(fmt, ...) \ - do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0) -#else -#define DPRINTF(fmt, ...) -#endif +#include "trace.h" GlobalProperty pc_compat_4_2[] = {}; const size_t pc_compat_4_2_len = G_N_ELEMENTS(pc_compat_4_2); @@ -350,7 +341,7 @@ void gsi_handler(void *opaque, int n, int level) { GSIState *s = opaque; - DPRINTF("pc: %s GSI %d\n", level ? "raising" : "lowering", n); + trace_pc_gsi_interrupt(n, level); if (n < ISA_NUM_IRQS) { qemu_set_irq(s->i8259_irq[n], level); } @@ -428,7 +419,7 @@ static void pic_irq_request(void *opaque, int irq, int level) CPUState *cs = first_cpu; X86CPU *cpu = X86_CPU(cs); - DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq); + trace_pc_pic_interrupt(irq, level); if (cpu->apic_state && !kvm_irqchip_in_kernel()) { CPU_FOREACH(cs) { cpu = X86_CPU(cs); @@ -762,7 +753,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, Port92State *s = opaque; int oldval = s->outport; - DPRINTF("port92: write 0x%02" PRIx64 "\n", val); + trace_port92_write(val); s->outport = val; qemu_set_irq(s->a20_out, (val >> 1) & 1); if ((val & 1) && !(oldval & 1)) { @@ -777,7 +768,7 @@ static uint64_t port92_read(void *opaque, hwaddr addr, uint32_t ret; ret = s->outport; - DPRINTF("port92: read 0x%02x\n", ret); + trace_port92_read(ret); return ret; } diff --git a/hw/i386/trace-events b/hw/i386/trace-events index c8bc464bc5..43f33cf7e2 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -111,3 +111,9 @@ amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) "hi 0x%"PRIx64" lo 0x%"PRIx64 # vmport.c vmport_register(unsigned char command, void *func, void *opaque) "command: 0x%02x func: %p opaque: %p" vmport_command(unsigned char command) "command: 0x%02x" + +# pc.c +pc_gsi_interrupt(int irqn, int level) "GSI interrupt #%d level:%d" +pc_pic_interrupt(int irqn, int level) "PIC interrupt #%d level:%d" +port92_read(uint8_t val) "port92: read 0x%02x" +port92_write(uint8_t val) "port92: write 0x%02x" -- cgit v1.2.3