From 697155cdf13f63001ded45664f3ca093630f1f69 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 28 Feb 2018 15:23:47 +0100 Subject: pc: replace pm object initialization with one-liner in acpi_get_pm_info() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit next patch will need it before it gets to piix4/lpc branches that initializes 'obj' now. Signed-off-by: Igor Mammedov Reviewed-by: Eric Auger Reviewed-by: Philippe Mathieu-Daudé Tested-by: Eric Auger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'hw/i386/acpi-build.c') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index deb440f286..b85fefe931 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -128,7 +128,7 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) { Object *piix = piix4_pm_find(); Object *lpc = ich9_lpc_find(); - Object *obj = NULL; + Object *obj = piix ? piix : lpc; QObject *o; pm->force_rev1_fadt = false; @@ -138,7 +138,6 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) if (piix) { /* w2k requires FADT(rev1) or it won't boot, keep PC compatible */ pm->force_rev1_fadt = true; - obj = piix; pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; pm->pcihp_io_base = object_property_get_uint(obj, ACPI_PCIHP_IO_BASE_PROP, NULL); @@ -146,7 +145,6 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL); } if (lpc) { - obj = lpc; pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; } assert(obj); -- cgit v1.2.3 From f8eaef67a3946cd483cbb77c50cf2ded55c0ddde Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 28 Feb 2018 15:23:50 +0100 Subject: acpi: move ACPI_PORT_SMI_CMD define to header it belongs to ACPI_PORT_SMI_CMD is alias for APM_CNT_IOPORT, so make it really one instead of duplicating its value. Signed-off-by: Igor Mammedov Reviewed-by: Eric Auger Tested-by: Eric Auger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'hw/i386/acpi-build.c') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b85fefe931..699f3a005f 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -255,8 +255,6 @@ static void acpi_get_pci_holes(Range *hole, Range *hole64) NULL)); } -#define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */ - static void acpi_align_size(GArray *blob, unsigned align) { /* Align size to multiple of given size. This reduces the chance -- cgit v1.2.3 From 937d1b58714b4002dd0fb7c3573c42b1c017e61b Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 28 Feb 2018 15:23:51 +0100 Subject: pc: acpi: isolate FADT specific data into AcpiFadtData structure move FADT data initialization out of fadt_setup() into dedicated init_fadt_data() that will set common for pc/q35 values in AcpiFadtData structure and acpi_get_pm_info() will complement it with pc/q35 specific values initialization. That will allow to get rid of fadt_setup() and generalize build_fadt() so it could be easily extended for rev5 and reused by ARM target. While at it also move facs/dsdt/xdsdt offsets from build_fadt() arg list into AcpiFadtData, as they belong to the same dataset. Signed-off-by: Igor Mammedov Reviewed-by: Eric Auger Tested-by: Eric Auger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 190 +++++++++++++++++++++++++++------------------------ 1 file changed, 102 insertions(+), 88 deletions(-) (limited to 'hw/i386/acpi-build.c') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 699f3a005f..1f88ed1a11 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -91,17 +91,11 @@ typedef struct AcpiMcfgInfo { } AcpiMcfgInfo; typedef struct AcpiPmInfo { - bool force_rev1_fadt; bool s3_disabled; bool s4_disabled; bool pcihp_bridge_en; uint8_t s4_val; - uint16_t sci_int; - uint8_t acpi_enable_cmd; - uint8_t acpi_disable_cmd; - uint32_t gpe0_blk; - uint32_t gpe0_blk_len; - uint32_t io_base; + AcpiFadtData fadt; uint16_t cpu_hp_io_base; uint16_t pcihp_io_base; uint16_t pcihp_io_len; @@ -124,20 +118,59 @@ typedef struct AcpiBuildPciBusHotplugState { bool pcihp_bridge_en; } AcpiBuildPciBusHotplugState; +static void init_common_fadt_data(Object *o, AcpiFadtData *data) +{ + uint32_t io = object_property_get_uint(o, ACPI_PM_PROP_PM_IO_BASE, NULL); + AmlAddressSpace as = AML_AS_SYSTEM_IO; + AcpiFadtData fadt = { + .rev = 3, + .flags = + (1 << ACPI_FADT_F_WBINVD) | + (1 << ACPI_FADT_F_PROC_C1) | + (1 << ACPI_FADT_F_SLP_BUTTON) | + (1 << ACPI_FADT_F_RTC_S4) | + (1 << ACPI_FADT_F_USE_PLATFORM_CLOCK) | + /* APIC destination mode ("Flat Logical") has an upper limit of 8 + * CPUs for more than 8 CPUs, "Clustered Logical" mode has to be + * used + */ + ((max_cpus > 8) ? (1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL) : 0), + .int_model = 1 /* Multiple APIC */, + .rtc_century = RTC_CENTURY, + .plvl2_lat = 0xfff /* C2 state not supported */, + .plvl3_lat = 0xfff /* C3 state not supported */, + .smi_cmd = ACPI_PORT_SMI_CMD, + .sci_int = object_property_get_uint(o, ACPI_PM_PROP_SCI_INT, NULL), + .acpi_enable_cmd = + object_property_get_uint(o, ACPI_PM_PROP_ACPI_ENABLE_CMD, NULL), + .acpi_disable_cmd = + object_property_get_uint(o, ACPI_PM_PROP_ACPI_DISABLE_CMD, NULL), + .pm1a_evt = { .space_id = as, .bit_width = 4 * 8, .address = io }, + .pm1a_cnt = { .space_id = as, .bit_width = 2 * 8, + .address = io + 0x04 }, + .pm_tmr = { .space_id = as, .bit_width = 4 * 8, .address = io + 0x08 }, + .gpe0_blk = { .space_id = as, .bit_width = + object_property_get_uint(o, ACPI_PM_PROP_GPE0_BLK_LEN, NULL) * 8, + .address = object_property_get_uint(o, ACPI_PM_PROP_GPE0_BLK, NULL) + }, + }; + *data = fadt; +} + static void acpi_get_pm_info(AcpiPmInfo *pm) { Object *piix = piix4_pm_find(); Object *lpc = ich9_lpc_find(); Object *obj = piix ? piix : lpc; QObject *o; - - pm->force_rev1_fadt = false; pm->cpu_hp_io_base = 0; pm->pcihp_io_base = 0; pm->pcihp_io_len = 0; + + init_common_fadt_data(obj, &pm->fadt); if (piix) { /* w2k requires FADT(rev1) or it won't boot, keep PC compatible */ - pm->force_rev1_fadt = true; + pm->fadt.rev = 1; pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; pm->pcihp_io_base = object_property_get_uint(obj, ACPI_PCIHP_IO_BASE_PROP, NULL); @@ -145,10 +178,19 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL); } if (lpc) { + struct AcpiGenericAddress r = { .space_id = AML_AS_SYSTEM_IO, + .bit_width = 8, .address = ICH9_RST_CNT_IOPORT }; + pm->fadt.reset_reg = r; + pm->fadt.reset_val = 0xf; + pm->fadt.flags |= 1 << ACPI_FADT_F_RESET_REG_SUP; pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; } assert(obj); + /* The above need not be conditional on machine type because the reset port + * happens to be the same on PIIX (pc) and ICH9 (q35). */ + QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != RCR_IOPORT); + /* Fill in optional s3/s4 related properties */ o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); if (o) { @@ -172,22 +214,6 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) } qobject_decref(o); - /* Fill in mandatory properties */ - pm->sci_int = object_property_get_uint(obj, ACPI_PM_PROP_SCI_INT, NULL); - - pm->acpi_enable_cmd = object_property_get_uint(obj, - ACPI_PM_PROP_ACPI_ENABLE_CMD, - NULL); - pm->acpi_disable_cmd = - object_property_get_uint(obj, - ACPI_PM_PROP_ACPI_DISABLE_CMD, - NULL); - pm->io_base = object_property_get_uint(obj, ACPI_PM_PROP_PM_IO_BASE, - NULL); - pm->gpe0_blk = object_property_get_uint(obj, ACPI_PM_PROP_GPE0_BLK, - NULL); - pm->gpe0_blk_len = object_property_get_uint(obj, ACPI_PM_PROP_GPE0_BLK_LEN, - NULL); pm->pcihp_bridge_en = object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support", NULL); @@ -273,73 +299,53 @@ build_facs(GArray *table_data, BIOSLinker *linker) } /* Load chipset information in FADT */ -static void fadt_setup(AcpiFadtDescriptorRev3 *fadt, AcpiPmInfo *pm) +static void fadt_setup(AcpiFadtDescriptorRev3 *fadt, AcpiFadtData f) { - fadt->model = 1; + fadt->model = f.int_model; fadt->reserved1 = 0; - fadt->sci_int = cpu_to_le16(pm->sci_int); - fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD); - fadt->acpi_enable = pm->acpi_enable_cmd; - fadt->acpi_disable = pm->acpi_disable_cmd; + fadt->sci_int = cpu_to_le16(f.sci_int); + fadt->smi_cmd = cpu_to_le32(f.smi_cmd); + fadt->acpi_enable = f.acpi_enable_cmd; + fadt->acpi_disable = f.acpi_disable_cmd; /* EVT, CNT, TMR offset matches hw/acpi/core.c */ - fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base); - fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04); - fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08); - fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk); + fadt->pm1a_evt_blk = cpu_to_le32(f.pm1a_evt.address); + fadt->pm1a_cnt_blk = cpu_to_le32(f.pm1a_cnt.address); + fadt->pm_tmr_blk = cpu_to_le32(f.pm_tmr.address); + fadt->gpe0_blk = cpu_to_le32(f.gpe0_blk.address); /* EVT, CNT, TMR length matches hw/acpi/core.c */ - fadt->pm1_evt_len = 4; - fadt->pm1_cnt_len = 2; - fadt->pm_tmr_len = 4; - fadt->gpe0_blk_len = pm->gpe0_blk_len; - fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */ - fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */ - fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) | - (1 << ACPI_FADT_F_PROC_C1) | - (1 << ACPI_FADT_F_SLP_BUTTON) | - (1 << ACPI_FADT_F_RTC_S4)); - fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK); - /* APIC destination mode ("Flat Logical") has an upper limit of 8 CPUs - * For more than 8 CPUs, "Clustered Logical" mode has to be used - */ - if (max_cpus > 8) { - fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL); - } - fadt->century = RTC_CENTURY; - if (pm->force_rev1_fadt) { + fadt->pm1_evt_len = f.pm1a_evt.bit_width / 8; + fadt->pm1_cnt_len = f.pm1a_cnt.bit_width / 8; + fadt->pm_tmr_len = f.pm_tmr.bit_width / 8; + fadt->gpe0_blk_len = f.gpe0_blk.bit_width / 8; + fadt->plvl2_lat = cpu_to_le16(f.plvl2_lat); + fadt->plvl3_lat = cpu_to_le16(f.plvl3_lat); + fadt->flags = cpu_to_le32(f.flags); + fadt->century = f.rtc_century; + if (f.rev == 1) { return; } - fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_RESET_REG_SUP); - fadt->reset_value = 0xf; - fadt->reset_register.space_id = AML_SYSTEM_IO; - fadt->reset_register.bit_width = 8; - fadt->reset_register.address = cpu_to_le64(ICH9_RST_CNT_IOPORT); - /* The above need not be conditional on machine type because the reset port - * happens to be the same on PIIX (pc) and ICH9 (q35). */ - QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != RCR_IOPORT); + fadt->reset_value = f.reset_val; + fadt->reset_register = f.reset_reg; + fadt->reset_register.address = cpu_to_le64(f.reset_reg.address); - fadt->xpm1a_event_block.space_id = AML_SYSTEM_IO; - fadt->xpm1a_event_block.bit_width = fadt->pm1_evt_len * 8; - fadt->xpm1a_event_block.address = cpu_to_le64(pm->io_base); + fadt->xpm1a_event_block = f.pm1a_evt; + fadt->xpm1a_event_block.address = cpu_to_le64(f.pm1a_evt.address); - fadt->xpm1a_control_block.space_id = AML_SYSTEM_IO; - fadt->xpm1a_control_block.bit_width = fadt->pm1_cnt_len * 8; - fadt->xpm1a_control_block.address = cpu_to_le64(pm->io_base + 0x4); + fadt->xpm1a_control_block = f.pm1a_cnt; + fadt->xpm1a_control_block.address = cpu_to_le64(f.pm1a_cnt.address); - fadt->xpm_timer_block.space_id = AML_SYSTEM_IO; - fadt->xpm_timer_block.bit_width = fadt->pm_tmr_len * 8; - fadt->xpm_timer_block.address = cpu_to_le64(pm->io_base + 0x8); + fadt->xpm_timer_block = f.pm_tmr; + fadt->xpm_timer_block.address = cpu_to_le64(f.pm_tmr.address); - fadt->xgpe0_block.space_id = AML_SYSTEM_IO; - fadt->xgpe0_block.bit_width = pm->gpe0_blk_len * 8; - fadt->xgpe0_block.address = cpu_to_le64(pm->gpe0_blk); + fadt->xgpe0_block = f.gpe0_blk; + fadt->xgpe0_block.address = cpu_to_le64(f.gpe0_blk.address); } /* FADT */ static void -build_fadt(GArray *table_data, BIOSLinker *linker, AcpiPmInfo *pm, - unsigned facs_tbl_offset, unsigned dsdt_tbl_offset, +build_fadt(GArray *table_data, BIOSLinker *linker, AcpiFadtData *f, const char *oem_id, const char *oem_table_id) { AcpiFadtDescriptorRev3 *fadt = acpi_data_push(table_data, sizeof(*fadt)); @@ -347,29 +353,29 @@ build_fadt(GArray *table_data, BIOSLinker *linker, AcpiPmInfo *pm, unsigned dsdt_entry_offset = (char *)&fadt->dsdt - table_data->data; unsigned xdsdt_entry_offset = (char *)&fadt->x_dsdt - table_data->data; int fadt_size = sizeof(*fadt); - int rev = 3; /* FACS address to be filled by Guest linker */ bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, fw_ctrl_offset, sizeof(fadt->firmware_ctrl), - ACPI_BUILD_TABLE_FILE, facs_tbl_offset); + ACPI_BUILD_TABLE_FILE, *f->facs_tbl_offset); /* DSDT address to be filled by Guest linker */ - fadt_setup(fadt, pm); + fadt_setup(fadt, *f); bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, dsdt_entry_offset, sizeof(fadt->dsdt), - ACPI_BUILD_TABLE_FILE, dsdt_tbl_offset); - if (pm->force_rev1_fadt) { - rev = 1; + ACPI_BUILD_TABLE_FILE, *f->dsdt_tbl_offset); + + if (f->rev == 1) { fadt_size = offsetof(typeof(*fadt), reset_register); - } else { + } else if (f->xdsdt_tbl_offset) { bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, xdsdt_entry_offset, sizeof(fadt->x_dsdt), - ACPI_BUILD_TABLE_FILE, dsdt_tbl_offset); + ACPI_BUILD_TABLE_FILE, *f->xdsdt_tbl_offset); } build_header(linker, table_data, - (void *)fadt, "FACP", fadt_size, rev, oem_id, oem_table_id); + (void *)fadt, "FACP", fadt_size, f->rev, + oem_id, oem_table_id); } void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, @@ -2049,7 +2055,12 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); crs = aml_resource_template(); aml_append(crs, - aml_io(AML_DECODE16, pm->gpe0_blk, pm->gpe0_blk, 1, pm->gpe0_blk_len) + aml_io( + AML_DECODE16, + pm->fadt.gpe0_blk.address, + pm->fadt.gpe0_blk.address, + 1, + pm->fadt.gpe0_blk.bit_width / 8) ); aml_append(dev, aml_name_decl("_CRS", crs)); aml_append(scope, dev); @@ -2696,7 +2707,10 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) /* ACPI tables pointed to by RSDT */ fadt = tables_blob->len; acpi_add_table(table_offsets, tables_blob); - build_fadt(tables_blob, tables->linker, &pm, facs, dsdt, + pm.fadt.facs_tbl_offset = &facs; + pm.fadt.dsdt_tbl_offset = &dsdt; + pm.fadt.xdsdt_tbl_offset = &dsdt; + build_fadt(tables_blob, tables->linker, &pm.fadt, slic_oem.id, slic_oem.table_id); aml_len += tables_blob->len - fadt; -- cgit v1.2.3 From 5d7a334f7c40dcb6aab3e4496ac826e813ccdb07 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 28 Feb 2018 15:23:52 +0100 Subject: pc: acpi: use build_append_foo() API to construct FADT build_append_foo() API doesn't need explicit endianness conversions which eliminates a source of errors and it makes build_fadt() look like declarative definition of FADT table in ACPI spec, which makes it easy to review. Also it allows easily extending FADT to support other revisions which will be used by follow up patches where build_fadt() will be reused for ARM target. Signed-off-by: Igor Mammedov Reviewed-by: Eric Auger Tested-by: Eric Auger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 146 +++++++++++++++++++++++++++++---------------------- 1 file changed, 84 insertions(+), 62 deletions(-) (limited to 'hw/i386/acpi-build.c') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 1f88ed1a11..d1b387e77b 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -298,84 +298,106 @@ build_facs(GArray *table_data, BIOSLinker *linker) facs->length = cpu_to_le32(sizeof(*facs)); } -/* Load chipset information in FADT */ -static void fadt_setup(AcpiFadtDescriptorRev3 *fadt, AcpiFadtData f) -{ - fadt->model = f.int_model; - fadt->reserved1 = 0; - fadt->sci_int = cpu_to_le16(f.sci_int); - fadt->smi_cmd = cpu_to_le32(f.smi_cmd); - fadt->acpi_enable = f.acpi_enable_cmd; - fadt->acpi_disable = f.acpi_disable_cmd; - /* EVT, CNT, TMR offset matches hw/acpi/core.c */ - fadt->pm1a_evt_blk = cpu_to_le32(f.pm1a_evt.address); - fadt->pm1a_cnt_blk = cpu_to_le32(f.pm1a_cnt.address); - fadt->pm_tmr_blk = cpu_to_le32(f.pm_tmr.address); - fadt->gpe0_blk = cpu_to_le32(f.gpe0_blk.address); - /* EVT, CNT, TMR length matches hw/acpi/core.c */ - fadt->pm1_evt_len = f.pm1a_evt.bit_width / 8; - fadt->pm1_cnt_len = f.pm1a_cnt.bit_width / 8; - fadt->pm_tmr_len = f.pm_tmr.bit_width / 8; - fadt->gpe0_blk_len = f.gpe0_blk.bit_width / 8; - fadt->plvl2_lat = cpu_to_le16(f.plvl2_lat); - fadt->plvl3_lat = cpu_to_le16(f.plvl3_lat); - fadt->flags = cpu_to_le32(f.flags); - fadt->century = f.rtc_century; - if (f.rev == 1) { - return; - } - - fadt->reset_value = f.reset_val; - fadt->reset_register = f.reset_reg; - fadt->reset_register.address = cpu_to_le64(f.reset_reg.address); - - fadt->xpm1a_event_block = f.pm1a_evt; - fadt->xpm1a_event_block.address = cpu_to_le64(f.pm1a_evt.address); - - fadt->xpm1a_control_block = f.pm1a_cnt; - fadt->xpm1a_control_block.address = cpu_to_le64(f.pm1a_cnt.address); - - fadt->xpm_timer_block = f.pm_tmr; - fadt->xpm_timer_block.address = cpu_to_le64(f.pm_tmr.address); - - fadt->xgpe0_block = f.gpe0_blk; - fadt->xgpe0_block.address = cpu_to_le64(f.gpe0_blk.address); -} - - /* FADT */ static void -build_fadt(GArray *table_data, BIOSLinker *linker, AcpiFadtData *f, +build_fadt(GArray *tbl, BIOSLinker *linker, AcpiFadtData *f, const char *oem_id, const char *oem_table_id) { - AcpiFadtDescriptorRev3 *fadt = acpi_data_push(table_data, sizeof(*fadt)); - unsigned fw_ctrl_offset = (char *)&fadt->firmware_ctrl - table_data->data; - unsigned dsdt_entry_offset = (char *)&fadt->dsdt - table_data->data; - unsigned xdsdt_entry_offset = (char *)&fadt->x_dsdt - table_data->data; - int fadt_size = sizeof(*fadt); + int off; + int fadt_start = tbl->len; - /* FACS address to be filled by Guest linker */ + acpi_data_push(tbl, sizeof(AcpiTableHeader)); + + /* FACS address to be filled by Guest linker at runtime */ + off = tbl->len; + build_append_int_noprefix(tbl, 0, 4); /* FIRMWARE_CTRL */ bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, fw_ctrl_offset, sizeof(fadt->firmware_ctrl), + ACPI_BUILD_TABLE_FILE, off, 4, ACPI_BUILD_TABLE_FILE, *f->facs_tbl_offset); - /* DSDT address to be filled by Guest linker */ - fadt_setup(fadt, *f); + /* DSDT address to be filled by Guest linker at runtime */ + off = tbl->len; + build_append_int_noprefix(tbl, 0, 4); /* DSDT */ bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, dsdt_entry_offset, sizeof(fadt->dsdt), + ACPI_BUILD_TABLE_FILE, off, 4, ACPI_BUILD_TABLE_FILE, *f->dsdt_tbl_offset); + /* ACPI1.0: INT_MODEL, ACPI2.0+: Reserved */ + build_append_int_noprefix(tbl, f->int_model /* Multiple APIC */, 1); + /* Preferred_PM_Profile */ + build_append_int_noprefix(tbl, 0 /* Unspecified */, 1); + build_append_int_noprefix(tbl, f->sci_int, 2); /* SCI_INT */ + build_append_int_noprefix(tbl, f->smi_cmd, 4); /* SMI_CMD */ + build_append_int_noprefix(tbl, f->acpi_enable_cmd, 1); /* ACPI_ENABLE */ + build_append_int_noprefix(tbl, f->acpi_disable_cmd, 1); /* ACPI_DISABLE */ + build_append_int_noprefix(tbl, 0 /* not supported */, 1); /* S4BIOS_REQ */ + /* ACPI1.0: Reserved, ACPI2.0+: PSTATE_CNT */ + build_append_int_noprefix(tbl, 0, 1); + build_append_int_noprefix(tbl, f->pm1a_evt.address, 4); /* PM1a_EVT_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* PM1b_EVT_BLK */ + build_append_int_noprefix(tbl, f->pm1a_cnt.address, 4); /* PM1a_CNT_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* PM1b_CNT_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* PM2_CNT_BLK */ + build_append_int_noprefix(tbl, f->pm_tmr.address, 4); /* PM_TMR_BLK */ + build_append_int_noprefix(tbl, f->gpe0_blk.address, 4); /* GPE0_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* GPE1_BLK */ + /* PM1_EVT_LEN */ + build_append_int_noprefix(tbl, f->pm1a_evt.bit_width / 8, 1); + /* PM1_CNT_LEN */ + build_append_int_noprefix(tbl, f->pm1a_cnt.bit_width / 8, 1); + build_append_int_noprefix(tbl, 0, 1); /* PM2_CNT_LEN */ + build_append_int_noprefix(tbl, f->pm_tmr.bit_width / 8, 1); /* PM_TMR_LEN */ + /* GPE0_BLK_LEN */ + build_append_int_noprefix(tbl, f->gpe0_blk.bit_width / 8, 1); + build_append_int_noprefix(tbl, 0, 1); /* GPE1_BLK_LEN */ + build_append_int_noprefix(tbl, 0, 1); /* GPE1_BASE */ + build_append_int_noprefix(tbl, 0, 1); /* CST_CNT */ + build_append_int_noprefix(tbl, f->plvl2_lat, 2); /* P_LVL2_LAT */ + build_append_int_noprefix(tbl, f->plvl3_lat, 2); /* P_LVL3_LAT */ + build_append_int_noprefix(tbl, 0, 2); /* FLUSH_SIZE */ + build_append_int_noprefix(tbl, 0, 2); /* FLUSH_STRIDE */ + build_append_int_noprefix(tbl, 0, 1); /* DUTY_OFFSET */ + build_append_int_noprefix(tbl, 0, 1); /* DUTY_WIDTH */ + build_append_int_noprefix(tbl, 0, 1); /* DAY_ALRM */ + build_append_int_noprefix(tbl, 0, 1); /* MON_ALRM */ + build_append_int_noprefix(tbl, f->rtc_century, 1); /* CENTURY */ + build_append_int_noprefix(tbl, 0, 2); /* IAPC_BOOT_ARCH */ + build_append_int_noprefix(tbl, 0, 1); /* Reserved */ + build_append_int_noprefix(tbl, f->flags, 4); /* Flags */ + if (f->rev == 1) { - fadt_size = offsetof(typeof(*fadt), reset_register); - } else if (f->xdsdt_tbl_offset) { + goto build_hdr; + } + + build_append_gas_from_struct(tbl, &f->reset_reg); /* RESET_REG */ + build_append_int_noprefix(tbl, f->reset_val, 1); /* RESET_VALUE */ + build_append_int_noprefix(tbl, 0, 3); /* Reserved, ACPI 3.0 */ + build_append_int_noprefix(tbl, 0, 8); /* X_FIRMWARE_CTRL */ + + /* XDSDT address to be filled by Guest linker at runtime */ + off = tbl->len; + build_append_int_noprefix(tbl, 0, 8); /* X_DSDT */ + if (f->xdsdt_tbl_offset) { bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, xdsdt_entry_offset, sizeof(fadt->x_dsdt), + ACPI_BUILD_TABLE_FILE, off, 8, ACPI_BUILD_TABLE_FILE, *f->xdsdt_tbl_offset); } - build_header(linker, table_data, - (void *)fadt, "FACP", fadt_size, f->rev, - oem_id, oem_table_id); + build_append_gas_from_struct(tbl, &f->pm1a_evt); /* X_PM1a_EVT_BLK */ + /* X_PM1b_EVT_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); + build_append_gas_from_struct(tbl, &f->pm1a_cnt); /* X_PM1a_CNT_BLK */ + /* X_PM1b_CNT_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); + /* X_PM2_CNT_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); + build_append_gas_from_struct(tbl, &f->pm_tmr); /* X_PM_TMR_BLK */ + build_append_gas_from_struct(tbl, &f->gpe0_blk); /* X_GPE0_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); /* X_GPE1_BLK */ + +build_hdr: + build_header(linker, tbl, (void *)(tbl->data + fadt_start), + "FACP", tbl->len - fadt_start, f->rev, oem_id, oem_table_id); } void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, -- cgit v1.2.3 From 8612f8bd9fb667c62e9a56c67ab2e3af2798dd9c Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 28 Feb 2018 15:23:53 +0100 Subject: acpi: move build_fadt() from i386 specific to generic ACPI source It will be extended and reused by follow up patch for ARM target. PS: Since it's generic function now, don't patch FIRMWARE_CTRL, DSDT fields if they don't point to tables since platform might not provide them and use X_ variants instead if applicable. Signed-off-by: Igor Mammedov Reviewed-by: Eric Auger Tested-by: Eric Auger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 102 --------------------------------------------------- 1 file changed, 102 deletions(-) (limited to 'hw/i386/acpi-build.c') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index d1b387e77b..ebde2cda9d 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -298,108 +298,6 @@ build_facs(GArray *table_data, BIOSLinker *linker) facs->length = cpu_to_le32(sizeof(*facs)); } -/* FADT */ -static void -build_fadt(GArray *tbl, BIOSLinker *linker, AcpiFadtData *f, - const char *oem_id, const char *oem_table_id) -{ - int off; - int fadt_start = tbl->len; - - acpi_data_push(tbl, sizeof(AcpiTableHeader)); - - /* FACS address to be filled by Guest linker at runtime */ - off = tbl->len; - build_append_int_noprefix(tbl, 0, 4); /* FIRMWARE_CTRL */ - bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, off, 4, - ACPI_BUILD_TABLE_FILE, *f->facs_tbl_offset); - - /* DSDT address to be filled by Guest linker at runtime */ - off = tbl->len; - build_append_int_noprefix(tbl, 0, 4); /* DSDT */ - bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, off, 4, - ACPI_BUILD_TABLE_FILE, *f->dsdt_tbl_offset); - - /* ACPI1.0: INT_MODEL, ACPI2.0+: Reserved */ - build_append_int_noprefix(tbl, f->int_model /* Multiple APIC */, 1); - /* Preferred_PM_Profile */ - build_append_int_noprefix(tbl, 0 /* Unspecified */, 1); - build_append_int_noprefix(tbl, f->sci_int, 2); /* SCI_INT */ - build_append_int_noprefix(tbl, f->smi_cmd, 4); /* SMI_CMD */ - build_append_int_noprefix(tbl, f->acpi_enable_cmd, 1); /* ACPI_ENABLE */ - build_append_int_noprefix(tbl, f->acpi_disable_cmd, 1); /* ACPI_DISABLE */ - build_append_int_noprefix(tbl, 0 /* not supported */, 1); /* S4BIOS_REQ */ - /* ACPI1.0: Reserved, ACPI2.0+: PSTATE_CNT */ - build_append_int_noprefix(tbl, 0, 1); - build_append_int_noprefix(tbl, f->pm1a_evt.address, 4); /* PM1a_EVT_BLK */ - build_append_int_noprefix(tbl, 0, 4); /* PM1b_EVT_BLK */ - build_append_int_noprefix(tbl, f->pm1a_cnt.address, 4); /* PM1a_CNT_BLK */ - build_append_int_noprefix(tbl, 0, 4); /* PM1b_CNT_BLK */ - build_append_int_noprefix(tbl, 0, 4); /* PM2_CNT_BLK */ - build_append_int_noprefix(tbl, f->pm_tmr.address, 4); /* PM_TMR_BLK */ - build_append_int_noprefix(tbl, f->gpe0_blk.address, 4); /* GPE0_BLK */ - build_append_int_noprefix(tbl, 0, 4); /* GPE1_BLK */ - /* PM1_EVT_LEN */ - build_append_int_noprefix(tbl, f->pm1a_evt.bit_width / 8, 1); - /* PM1_CNT_LEN */ - build_append_int_noprefix(tbl, f->pm1a_cnt.bit_width / 8, 1); - build_append_int_noprefix(tbl, 0, 1); /* PM2_CNT_LEN */ - build_append_int_noprefix(tbl, f->pm_tmr.bit_width / 8, 1); /* PM_TMR_LEN */ - /* GPE0_BLK_LEN */ - build_append_int_noprefix(tbl, f->gpe0_blk.bit_width / 8, 1); - build_append_int_noprefix(tbl, 0, 1); /* GPE1_BLK_LEN */ - build_append_int_noprefix(tbl, 0, 1); /* GPE1_BASE */ - build_append_int_noprefix(tbl, 0, 1); /* CST_CNT */ - build_append_int_noprefix(tbl, f->plvl2_lat, 2); /* P_LVL2_LAT */ - build_append_int_noprefix(tbl, f->plvl3_lat, 2); /* P_LVL3_LAT */ - build_append_int_noprefix(tbl, 0, 2); /* FLUSH_SIZE */ - build_append_int_noprefix(tbl, 0, 2); /* FLUSH_STRIDE */ - build_append_int_noprefix(tbl, 0, 1); /* DUTY_OFFSET */ - build_append_int_noprefix(tbl, 0, 1); /* DUTY_WIDTH */ - build_append_int_noprefix(tbl, 0, 1); /* DAY_ALRM */ - build_append_int_noprefix(tbl, 0, 1); /* MON_ALRM */ - build_append_int_noprefix(tbl, f->rtc_century, 1); /* CENTURY */ - build_append_int_noprefix(tbl, 0, 2); /* IAPC_BOOT_ARCH */ - build_append_int_noprefix(tbl, 0, 1); /* Reserved */ - build_append_int_noprefix(tbl, f->flags, 4); /* Flags */ - - if (f->rev == 1) { - goto build_hdr; - } - - build_append_gas_from_struct(tbl, &f->reset_reg); /* RESET_REG */ - build_append_int_noprefix(tbl, f->reset_val, 1); /* RESET_VALUE */ - build_append_int_noprefix(tbl, 0, 3); /* Reserved, ACPI 3.0 */ - build_append_int_noprefix(tbl, 0, 8); /* X_FIRMWARE_CTRL */ - - /* XDSDT address to be filled by Guest linker at runtime */ - off = tbl->len; - build_append_int_noprefix(tbl, 0, 8); /* X_DSDT */ - if (f->xdsdt_tbl_offset) { - bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, off, 8, - ACPI_BUILD_TABLE_FILE, *f->xdsdt_tbl_offset); - } - - build_append_gas_from_struct(tbl, &f->pm1a_evt); /* X_PM1a_EVT_BLK */ - /* X_PM1b_EVT_BLK */ - build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); - build_append_gas_from_struct(tbl, &f->pm1a_cnt); /* X_PM1a_CNT_BLK */ - /* X_PM1b_CNT_BLK */ - build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); - /* X_PM2_CNT_BLK */ - build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); - build_append_gas_from_struct(tbl, &f->pm_tmr); /* X_PM_TMR_BLK */ - build_append_gas_from_struct(tbl, &f->gpe0_blk); /* X_GPE0_BLK */ - build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); /* X_GPE1_BLK */ - -build_hdr: - build_header(linker, tbl, (void *)(tbl->data + fadt_start), - "FACP", tbl->len - fadt_start, f->rev, oem_id, oem_table_id); -} - void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry) { -- cgit v1.2.3 From 848a1cc1e8b04301d40aef2a0e21a783b8dcc1c5 Mon Sep 17 00:00:00 2001 From: Haozhong Zhang Date: Sun, 11 Mar 2018 11:02:13 +0800 Subject: hw/acpi-build: build SRAT memory affinity structures for DIMM devices ACPI 6.2A Table 5-129 "SPA Range Structure" requires the proximity domain of a NVDIMM SPA range must match with corresponding entry in SRAT table. The address ranges of vNVDIMM in QEMU are allocated from the hot-pluggable address space, which is entirely covered by one SRAT memory affinity structure. However, users can set the vNVDIMM proximity domain in NFIT SPA range structure by the 'node' property of '-device nvdimm' to a value different than the one in the above SRAT memory affinity structure. In order to solve such proximity domain mismatch, this patch builds one SRAT memory affinity structure for each DIMM device present at boot time, including both PC-DIMM and NVDIMM, with the proximity domain specified in '-device pc-dimm' or '-device nvdimm'. The remaining hot-pluggable address space is covered by one or multiple SRAT memory affinity structures with the proximity domain of the last node as before. Signed-off-by: Haozhong Zhang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 52 insertions(+), 4 deletions(-) (limited to 'hw/i386/acpi-build.c') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index ebde2cda9d..1df9ed275e 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2250,6 +2250,55 @@ build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog) #define HOLE_640K_START (640 * 1024) #define HOLE_640K_END (1024 * 1024) +static void build_srat_hotpluggable_memory(GArray *table_data, uint64_t base, + uint64_t len, int default_node) +{ + MemoryDeviceInfoList *info_list = qmp_pc_dimm_device_list(); + MemoryDeviceInfoList *info; + MemoryDeviceInfo *mi; + PCDIMMDeviceInfo *di; + uint64_t end = base + len, cur, size; + bool is_nvdimm; + AcpiSratMemoryAffinity *numamem; + MemoryAffinityFlags flags; + + for (cur = base, info = info_list; + cur < end; + cur += size, info = info->next) { + numamem = acpi_data_push(table_data, sizeof *numamem); + + if (!info) { + build_srat_memory(numamem, cur, end - cur, default_node, + MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED); + break; + } + + mi = info->value; + is_nvdimm = (mi->type == MEMORY_DEVICE_INFO_KIND_NVDIMM); + di = !is_nvdimm ? mi->u.dimm.data : mi->u.nvdimm.data; + + if (cur < di->addr) { + build_srat_memory(numamem, cur, di->addr - cur, default_node, + MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED); + numamem = acpi_data_push(table_data, sizeof *numamem); + } + + size = di->size; + + flags = MEM_AFFINITY_ENABLED; + if (di->hotpluggable) { + flags |= MEM_AFFINITY_HOTPLUGGABLE; + } + if (is_nvdimm) { + flags |= MEM_AFFINITY_NON_VOLATILE; + } + + build_srat_memory(numamem, di->addr, size, di->node, flags); + } + + qapi_free_MemoryDeviceInfoList(info_list); +} + static void build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine) { @@ -2361,10 +2410,9 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine) * providing _PXM method if necessary. */ if (hotplugabble_address_space_size) { - numamem = acpi_data_push(table_data, sizeof *numamem); - build_srat_memory(numamem, pcms->hotplug_memory.base, - hotplugabble_address_space_size, pcms->numa_nodes - 1, - MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED); + build_srat_hotpluggable_memory(table_data, pcms->hotplug_memory.base, + hotplugabble_address_space_size, + pcms->numa_nodes - 1); } build_header(linker, table_data, -- cgit v1.2.3