From c5fad12fa08228d0c2f04089ba0cd27718f1b723 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 20 Apr 2012 07:39:15 +0000 Subject: target-arm: Move A9 config_base_address reset value to ARMCPU MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the A9 config_base_address cp15 register reset value to ARMCPU. This should become a QOM property so that the Highbank board can set it without having to pull in cpu-qom.h, but at least this avoids the implicit dependency on reset ordering that the previous workaround had. Cc: Mark Langsdorf Signed-off-by: Peter Maydell Signed-off-by: Andreas Färber --- hw/highbank.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) (limited to 'hw/highbank.c') diff --git a/hw/highbank.c b/hw/highbank.c index 906eed5a47..4d6d728a28 100644 --- a/hw/highbank.c +++ b/hw/highbank.c @@ -35,12 +35,6 @@ #define NIRQ_GIC 160 /* Board init. */ -static void highbank_cpu_reset(void *opaque) -{ - CPUARMState *env = opaque; - - env->cp15.c15_config_base_address = GIC_BASE_ADDR; -} static void hb_write_secondary(CPUARMState *env, const struct arm_boot_info *info) { @@ -213,14 +207,17 @@ static void highbank_init(ram_addr_t ram_size, } for (n = 0; n < smp_cpus; n++) { - env = cpu_init(cpu_model); - if (!env) { + ARMCPU *cpu; + cpu = cpu_arm_init(cpu_model); + if (cpu == NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } + env = &cpu->env; + /* This will become a QOM property eventually */ + cpu->reset_cbar = GIC_BASE_ADDR; irqp = arm_pic_init_cpu(env); cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ]; - qemu_register_reset(highbank_cpu_reset, env); } sysmem = get_system_memory(); -- cgit v1.2.3