From 6682bc1ee431dc6198b85ac71d537104cfc57fed Mon Sep 17 00:00:00 2001 From: Stephen Checkoway Date: Fri, 26 Apr 2019 12:26:17 -0400 Subject: hw/block/pflash_cfi02: Fix command address comparison MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Most AMD commands only examine 11 bits of the address. This masks the addresses used in the comparison to 11 bits. The exceptions are word or sector addresses which use offset directly rather than the shifted offset, boff. Signed-off-by: Stephen Checkoway Message-Id: <20190426162624.55977-4-stephen.checkoway@oberlin.edu> Acked-by: Thomas Huth Acked-by: Alistair Francis Acked-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- hw/block/pflash_cfi02.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'hw/block/pflash_cfi02.c') diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index e64dc69c6c..4be3837be5 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -281,11 +281,13 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, } offset &= pfl->chip_len - 1; - boff = offset & (pfl->sector_len - 1); + boff = offset; if (pfl->width == 2) boff = boff >> 1; else if (pfl->width == 4) boff = boff >> 2; + /* Only the least-significant 11 bits are used in most cases. */ + boff &= 0x7FF; switch (pfl->wcycle) { case 0: /* Set the device in I/O access mode if required */ @@ -538,6 +540,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) } } + /* Only 11 bits are used in the comparison. */ + pfl->unlock_addr0 &= 0x7FF; + pfl->unlock_addr1 &= 0x7FF; + pflash_setup_mappings(pfl); pfl->rom_mode = 1; sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); -- cgit v1.2.3