From 7035b8420fa52e8c94cf4317c0f88c1b73ced28d Mon Sep 17 00:00:00 2001 From: Yu Li Date: Tue, 8 Feb 2022 21:07:23 +0800 Subject: docs/system: riscv: Update description of CPU Since the hypervisor extension been non experimental and enabled for default CPU, the previous command is no longer available and the option `x-h=true` or `h=true` is also no longer required. Signed-off-by: Yu Li Reviewed-by: Alistair Francis Message-Id: <9040401e-8f87-ef4a-d840-6703f08d068c@bytedance.com> Signed-off-by: Alistair Francis --- docs/system/riscv/virt.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'docs') diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst index fa016584bf..08ce3c4177 100644 --- a/docs/system/riscv/virt.rst +++ b/docs/system/riscv/virt.rst @@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices: * 1 generic PCIe host bridge * The fw_cfg device that allows a guest to obtain data from QEMU -Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions -can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true`` -enables the hypervisor extension for RV64. +The hypervisor extension has been enabled for the default CPU, so virtual +machines with hypervisor extension can simply be used without explicitly +declaring. Hardware configuration information ---------------------------------- -- cgit v1.2.3