From 9456c2fbcd82dd82328ac6e7602a815582b1043e Mon Sep 17 00:00:00 2001 From: Leon Alrae Date: Mon, 7 Jul 2014 11:24:00 +0100 Subject: target-mips: add TLBINV support For Standard TLB configuration (Config.MT=1): TLBINV invalidates a set of TLB entries based on ASID. The virtual address is ignored in the entry match. TLB entries which have their G bit set to 1 are not modified. TLBINVF causes all entries to be invalidated. Single TLB entry can be marked as invalid on TLB entry write by having EntryHi.EHINV set to 1. Signed-off-by: Leon Alrae Reviewed-by: Yongbok Kim --- disas/mips.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'disas') diff --git a/disas/mips.c b/disas/mips.c index 7297825138..4974bc0da2 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2410,6 +2410,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, 0, I1 }, {"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, 0, I1 }, {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, 0, I1 }, +{"tlbinv", "", 0x42000003, 0xffffffff, INSN_TLB, 0, I32 }, +{"tlbinvf", "", 0x42000004, 0xffffffff, INSN_TLB, 0, I32 }, {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, 0, I1 }, {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, 0, I2 }, {"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, 0, I2 }, -- cgit v1.2.3