From 90379ca84ebe94b0adc08794d90ea1e196b2a724 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 6 Aug 2014 11:48:48 -0700 Subject: tcg-sparc: Use ADDXC in addsub2_i64 On T4 and newer Sparc chips we have an add-with-carry insn that takes its input from %xcc instead of %icc. Signed-off-by: Richard Henderson --- disas/sparc.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'disas') diff --git a/disas/sparc.c b/disas/sparc.c index 8eb22e6fc3..092e1b6098 100644 --- a/disas/sparc.c +++ b/disas/sparc.c @@ -2042,6 +2042,9 @@ IMPDEP ("impdep2", 0x37), #undef IMPDEP +{ "addxc", F3F(2, 0x36, 0x011), F3F(~2, ~0x36, ~0x011), "1,2,d", 0, v9b }, +{ "addxccc", F3F(2, 0x36, 0x013), F3F(~2, ~0x36, ~0x013), "1,2,d", 0, v9b }, + }; static const int sparc_num_opcodes = ((sizeof sparc_opcodes)/(sizeof sparc_opcodes[0])); -- cgit v1.2.3