From ecc268e7c2488c0285684fad6d04cac6a794991d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 2 Dec 2020 18:53:20 +0100 Subject: target/mips: Do not initialize MT registers if MT ASE absent MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do not initialize MT-related config registers if the MT ASE is not present. As some functions access the 'mvp' structure, we still zero-allocate it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20201204222622.2743175-4-f4bug@amsat.org> --- target/mips/translate_init.c.inc | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.c.inc index 5a926bc6df..f72fee3b40 100644 --- a/target/mips/translate_init.c.inc +++ b/target/mips/translate_init.c.inc @@ -993,6 +993,10 @@ static void mvp_init(CPUMIPSState *env) { env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext)); + if (!ase_mt_available(env)) { + return; + } + /* MVPConf1 implemented, TLB sharable, no gating storage support, programmable cache partitioning implemented, number of allocatable and shareable TLB entries, MVP has allocatable TCs, 2 VPEs -- cgit v1.2.3