From ea5dcf4e1d00ea6de8112968164a97ce8a92ddce Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 4 Oct 2019 01:04:01 +0200 Subject: hw: Move Aspeed RTC from hw/timer/ to hw/rtc/ subdirectory MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move RTC devices under the hw/rtc/ subdirectory. Reviewed-by: Cédric Le Goater Reviewed-by: Alistair Francis Signed-off-by: Philippe Mathieu-Daudé Acked-by: Peter Maydell Message-Id: <20191003230404.19384-12-philmd@redhat.com> Signed-off-by: Laurent Vivier --- hw/rtc/Makefile.objs | 1 + hw/rtc/aspeed_rtc.c | 181 ++++++++++++++++++++++++++++++++++++++++++ hw/rtc/trace-events | 4 + hw/timer/Makefile.objs | 2 +- hw/timer/aspeed_rtc.c | 181 ------------------------------------------ hw/timer/trace-events | 4 - include/hw/arm/aspeed_soc.h | 2 +- include/hw/rtc/aspeed_rtc.h | 30 +++++++ include/hw/timer/aspeed_rtc.h | 30 ------- 9 files changed, 218 insertions(+), 217 deletions(-) create mode 100644 hw/rtc/aspeed_rtc.c delete mode 100644 hw/timer/aspeed_rtc.c create mode 100644 include/hw/rtc/aspeed_rtc.h delete mode 100644 include/hw/timer/aspeed_rtc.h diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs index 3d4763fc26..8dc9fcd3a9 100644 --- a/hw/rtc/Makefile.objs +++ b/hw/rtc/Makefile.objs @@ -10,3 +10,4 @@ common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-rtc.o common-obj-$(CONFIG_EXYNOS4) += exynos4210_rtc.o obj-$(CONFIG_MC146818RTC) += mc146818rtc.o common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o +common-obj-$(CONFIG_ASPEED_SOC) += aspeed_rtc.o diff --git a/hw/rtc/aspeed_rtc.c b/hw/rtc/aspeed_rtc.c new file mode 100644 index 0000000000..3ca1183558 --- /dev/null +++ b/hw/rtc/aspeed_rtc.c @@ -0,0 +1,181 @@ +/* + * ASPEED Real Time Clock + * Joel Stanley + * + * Copyright 2019 IBM Corp + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "hw/rtc/aspeed_rtc.h" +#include "migration/vmstate.h" +#include "qemu/log.h" +#include "qemu/timer.h" + +#include "trace.h" + +#define COUNTER1 (0x00 / 4) +#define COUNTER2 (0x04 / 4) +#define ALARM (0x08 / 4) +#define CONTROL (0x10 / 4) +#define ALARM_STATUS (0x14 / 4) + +#define RTC_UNLOCKED BIT(1) +#define RTC_ENABLED BIT(0) + +static void aspeed_rtc_calc_offset(AspeedRtcState *rtc) +{ + struct tm tm; + uint32_t year, cent; + uint32_t reg1 = rtc->reg[COUNTER1]; + uint32_t reg2 = rtc->reg[COUNTER2]; + + tm.tm_mday = (reg1 >> 24) & 0x1f; + tm.tm_hour = (reg1 >> 16) & 0x1f; + tm.tm_min = (reg1 >> 8) & 0x3f; + tm.tm_sec = (reg1 >> 0) & 0x3f; + + cent = (reg2 >> 16) & 0x1f; + year = (reg2 >> 8) & 0x7f; + tm.tm_mon = ((reg2 >> 0) & 0x0f) - 1; + tm.tm_year = year + (cent * 100) - 1900; + + rtc->offset = qemu_timedate_diff(&tm); +} + +static uint32_t aspeed_rtc_get_counter(AspeedRtcState *rtc, int r) +{ + uint32_t year, cent; + struct tm now; + + qemu_get_timedate(&now, rtc->offset); + + switch (r) { + case COUNTER1: + return (now.tm_mday << 24) | (now.tm_hour << 16) | + (now.tm_min << 8) | now.tm_sec; + case COUNTER2: + cent = (now.tm_year + 1900) / 100; + year = now.tm_year % 100; + return ((cent & 0x1f) << 16) | ((year & 0x7f) << 8) | + ((now.tm_mon + 1) & 0xf); + default: + g_assert_not_reached(); + } +} + +static uint64_t aspeed_rtc_read(void *opaque, hwaddr addr, + unsigned size) +{ + AspeedRtcState *rtc = opaque; + uint64_t val; + uint32_t r = addr >> 2; + + switch (r) { + case COUNTER1: + case COUNTER2: + if (rtc->reg[CONTROL] & RTC_ENABLED) { + rtc->reg[r] = aspeed_rtc_get_counter(rtc, r); + } + /* fall through */ + case CONTROL: + val = rtc->reg[r]; + break; + case ALARM: + case ALARM_STATUS: + default: + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx "\n", __func__, addr); + return 0; + } + + trace_aspeed_rtc_read(addr, val); + + return val; +} + +static void aspeed_rtc_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) +{ + AspeedRtcState *rtc = opaque; + uint32_t r = addr >> 2; + + switch (r) { + case COUNTER1: + case COUNTER2: + if (!(rtc->reg[CONTROL] & RTC_UNLOCKED)) { + break; + } + /* fall through */ + case CONTROL: + rtc->reg[r] = val; + aspeed_rtc_calc_offset(rtc); + break; + case ALARM: + case ALARM_STATUS: + default: + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx "\n", __func__, addr); + break; + } + trace_aspeed_rtc_write(addr, val); +} + +static void aspeed_rtc_reset(DeviceState *d) +{ + AspeedRtcState *rtc = ASPEED_RTC(d); + + rtc->offset = 0; + memset(rtc->reg, 0, sizeof(rtc->reg)); +} + +static const MemoryRegionOps aspeed_rtc_ops = { + .read = aspeed_rtc_read, + .write = aspeed_rtc_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +static const VMStateDescription vmstate_aspeed_rtc = { + .name = TYPE_ASPEED_RTC, + .version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(reg, AspeedRtcState, 0x18), + VMSTATE_INT32(offset, AspeedRtcState), + VMSTATE_INT32(offset, AspeedRtcState), + VMSTATE_END_OF_LIST() + } +}; + +static void aspeed_rtc_realize(DeviceState *dev, Error **errp) +{ + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + AspeedRtcState *s = ASPEED_RTC(dev); + + sysbus_init_irq(sbd, &s->irq); + + memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_rtc_ops, s, + "aspeed-rtc", 0x18ULL); + sysbus_init_mmio(sbd, &s->iomem); +} + +static void aspeed_rtc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = aspeed_rtc_realize; + dc->vmsd = &vmstate_aspeed_rtc; + dc->reset = aspeed_rtc_reset; +} + +static const TypeInfo aspeed_rtc_info = { + .name = TYPE_ASPEED_RTC, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(AspeedRtcState), + .class_init = aspeed_rtc_class_init, +}; + +static void aspeed_rtc_register_types(void) +{ + type_register_static(&aspeed_rtc_info); +} + +type_init(aspeed_rtc_register_types) diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events index 7f1945ad4c..d6749f4616 100644 --- a/hw/rtc/trace-events +++ b/hw/rtc/trace-events @@ -13,3 +13,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" pl031_alarm_raised(void) "alarm raised" pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks" + +# aspeed-rtc.c +aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 +aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs index 33191d74cb..83091770df 100644 --- a/hw/timer/Makefile.objs +++ b/hw/timer/Makefile.objs @@ -29,7 +29,7 @@ common-obj-$(CONFIG_MIPS_CPS) += mips_gictimer.o common-obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o common-obj-$(CONFIG_STM32F2XX_TIMER) += stm32f2xx_timer.o -common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o aspeed_rtc.o +common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o diff --git a/hw/timer/aspeed_rtc.c b/hw/timer/aspeed_rtc.c deleted file mode 100644 index 5313017353..0000000000 --- a/hw/timer/aspeed_rtc.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * ASPEED Real Time Clock - * Joel Stanley - * - * Copyright 2019 IBM Corp - * SPDX-License-Identifier: GPL-2.0-or-later - */ - -#include "qemu/osdep.h" -#include "qemu-common.h" -#include "hw/timer/aspeed_rtc.h" -#include "migration/vmstate.h" -#include "qemu/log.h" -#include "qemu/timer.h" - -#include "trace.h" - -#define COUNTER1 (0x00 / 4) -#define COUNTER2 (0x04 / 4) -#define ALARM (0x08 / 4) -#define CONTROL (0x10 / 4) -#define ALARM_STATUS (0x14 / 4) - -#define RTC_UNLOCKED BIT(1) -#define RTC_ENABLED BIT(0) - -static void aspeed_rtc_calc_offset(AspeedRtcState *rtc) -{ - struct tm tm; - uint32_t year, cent; - uint32_t reg1 = rtc->reg[COUNTER1]; - uint32_t reg2 = rtc->reg[COUNTER2]; - - tm.tm_mday = (reg1 >> 24) & 0x1f; - tm.tm_hour = (reg1 >> 16) & 0x1f; - tm.tm_min = (reg1 >> 8) & 0x3f; - tm.tm_sec = (reg1 >> 0) & 0x3f; - - cent = (reg2 >> 16) & 0x1f; - year = (reg2 >> 8) & 0x7f; - tm.tm_mon = ((reg2 >> 0) & 0x0f) - 1; - tm.tm_year = year + (cent * 100) - 1900; - - rtc->offset = qemu_timedate_diff(&tm); -} - -static uint32_t aspeed_rtc_get_counter(AspeedRtcState *rtc, int r) -{ - uint32_t year, cent; - struct tm now; - - qemu_get_timedate(&now, rtc->offset); - - switch (r) { - case COUNTER1: - return (now.tm_mday << 24) | (now.tm_hour << 16) | - (now.tm_min << 8) | now.tm_sec; - case COUNTER2: - cent = (now.tm_year + 1900) / 100; - year = now.tm_year % 100; - return ((cent & 0x1f) << 16) | ((year & 0x7f) << 8) | - ((now.tm_mon + 1) & 0xf); - default: - g_assert_not_reached(); - } -} - -static uint64_t aspeed_rtc_read(void *opaque, hwaddr addr, - unsigned size) -{ - AspeedRtcState *rtc = opaque; - uint64_t val; - uint32_t r = addr >> 2; - - switch (r) { - case COUNTER1: - case COUNTER2: - if (rtc->reg[CONTROL] & RTC_ENABLED) { - rtc->reg[r] = aspeed_rtc_get_counter(rtc, r); - } - /* fall through */ - case CONTROL: - val = rtc->reg[r]; - break; - case ALARM: - case ALARM_STATUS: - default: - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx "\n", __func__, addr); - return 0; - } - - trace_aspeed_rtc_read(addr, val); - - return val; -} - -static void aspeed_rtc_write(void *opaque, hwaddr addr, - uint64_t val, unsigned size) -{ - AspeedRtcState *rtc = opaque; - uint32_t r = addr >> 2; - - switch (r) { - case COUNTER1: - case COUNTER2: - if (!(rtc->reg[CONTROL] & RTC_UNLOCKED)) { - break; - } - /* fall through */ - case CONTROL: - rtc->reg[r] = val; - aspeed_rtc_calc_offset(rtc); - break; - case ALARM: - case ALARM_STATUS: - default: - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx "\n", __func__, addr); - break; - } - trace_aspeed_rtc_write(addr, val); -} - -static void aspeed_rtc_reset(DeviceState *d) -{ - AspeedRtcState *rtc = ASPEED_RTC(d); - - rtc->offset = 0; - memset(rtc->reg, 0, sizeof(rtc->reg)); -} - -static const MemoryRegionOps aspeed_rtc_ops = { - .read = aspeed_rtc_read, - .write = aspeed_rtc_write, - .endianness = DEVICE_NATIVE_ENDIAN, -}; - -static const VMStateDescription vmstate_aspeed_rtc = { - .name = TYPE_ASPEED_RTC, - .version_id = 1, - .fields = (VMStateField[]) { - VMSTATE_UINT32_ARRAY(reg, AspeedRtcState, 0x18), - VMSTATE_INT32(offset, AspeedRtcState), - VMSTATE_INT32(offset, AspeedRtcState), - VMSTATE_END_OF_LIST() - } -}; - -static void aspeed_rtc_realize(DeviceState *dev, Error **errp) -{ - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - AspeedRtcState *s = ASPEED_RTC(dev); - - sysbus_init_irq(sbd, &s->irq); - - memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_rtc_ops, s, - "aspeed-rtc", 0x18ULL); - sysbus_init_mmio(sbd, &s->iomem); -} - -static void aspeed_rtc_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - - dc->realize = aspeed_rtc_realize; - dc->vmsd = &vmstate_aspeed_rtc; - dc->reset = aspeed_rtc_reset; -} - -static const TypeInfo aspeed_rtc_info = { - .name = TYPE_ASPEED_RTC, - .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(AspeedRtcState), - .class_init = aspeed_rtc_class_init, -}; - -static void aspeed_rtc_register_types(void) -{ - type_register_static(&aspeed_rtc_info); -} - -type_init(aspeed_rtc_register_types) diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 1459d07237..e18b87fc96 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -66,10 +66,6 @@ cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK A cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" -# hw/timer/aspeed-rtc.c -aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 -aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 - # nrf51_timer.c nrf51_timer_read(uint64_t addr, uint32_t value, unsigned size) "read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" nrf51_timer_write(uint64_t addr, uint32_t value, unsigned size) "write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index cccb684a19..495c08be1b 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -18,7 +18,7 @@ #include "hw/misc/aspeed_sdmc.h" #include "hw/misc/aspeed_xdma.h" #include "hw/timer/aspeed_timer.h" -#include "hw/timer/aspeed_rtc.h" +#include "hw/rtc/aspeed_rtc.h" #include "hw/i2c/aspeed_i2c.h" #include "hw/ssi/aspeed_smc.h" #include "hw/watchdog/wdt_aspeed.h" diff --git a/include/hw/rtc/aspeed_rtc.h b/include/hw/rtc/aspeed_rtc.h new file mode 100644 index 0000000000..3fde854ad9 --- /dev/null +++ b/include/hw/rtc/aspeed_rtc.h @@ -0,0 +1,30 @@ +/* + * ASPEED Real Time Clock + * Joel Stanley + * + * Copyright 2019 IBM Corp + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_RTC_ASPEED_RTC_H +#define HW_RTC_ASPEED_RTC_H + +#include + +#include "hw/irq.h" +#include "hw/sysbus.h" + +typedef struct AspeedRtcState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + qemu_irq irq; + + uint32_t reg[0x18]; + int offset; + +} AspeedRtcState; + +#define TYPE_ASPEED_RTC "aspeed.rtc" +#define ASPEED_RTC(obj) OBJECT_CHECK(AspeedRtcState, (obj), TYPE_ASPEED_RTC) + +#endif /* HW_RTC_ASPEED_RTC_H */ diff --git a/include/hw/timer/aspeed_rtc.h b/include/hw/timer/aspeed_rtc.h deleted file mode 100644 index 15ba42912b..0000000000 --- a/include/hw/timer/aspeed_rtc.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * ASPEED Real Time Clock - * Joel Stanley - * - * Copyright 2019 IBM Corp - * SPDX-License-Identifier: GPL-2.0-or-later - */ -#ifndef ASPEED_RTC_H -#define ASPEED_RTC_H - -#include - -#include "hw/irq.h" -#include "hw/sysbus.h" - -typedef struct AspeedRtcState { - SysBusDevice parent_obj; - - MemoryRegion iomem; - qemu_irq irq; - - uint32_t reg[0x18]; - int offset; - -} AspeedRtcState; - -#define TYPE_ASPEED_RTC "aspeed.rtc" -#define ASPEED_RTC(obj) OBJECT_CHECK(AspeedRtcState, (obj), TYPE_ASPEED_RTC) - -#endif /* ASPEED_RTC_H */ -- cgit v1.2.3