From e7d51b3450893dfcef4af4238c48baf2d4b0ed31 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 29 Oct 2012 15:50:20 +1100 Subject: target-sparc: Revert setting cpu_dst to gen_dest_gpr There is some read-after-write error within the OP=2 insns which prevents setting cpu_dst to the real output register. Until this is found and fixed, always write to a temporary first. Cc: Blue Swirl Cc: Aurelien Jarno Signed-off-by: Richard Henderson Tested-by: Aurelien Jarno Signed-off-by: Blue Swirl --- target-sparc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 4321393688..9e46f1424b 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2633,7 +2633,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) case 2: /* FPU & Logical Operations */ { unsigned int xop = GET_FIELD(insn, 7, 12); - TCGv cpu_dst = gen_dest_gpr(dc, rd); + TCGv cpu_dst = get_temp_tl(dc); TCGv cpu_tmp0; if (xop == 0x3a) { /* generate trap */ -- cgit v1.2.3