From bb43d3839c29b17a2f5c122114cd4ca978065a18 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Mon, 16 Dec 2013 10:11:28 +0100 Subject: piix: gigabyte alignment for ram Map 3G (i440fx) of memory below 4G, so the RAM pieces are nicely aligned to gigabyte borders. Keep old memory layout for (a) old machine types and (b) in case all memory fits below 4G and thus we don't have to split RAM into pieces in the first place. The later makes sure this change doesn't take away memory from 32bit guests. So, with i440fx and up to 3.5 GB of memory, all of it will be mapped below 4G. With more than 3.5 GB of memory 3 GB will be mapped below 4G and the remaining amount will be mapped above 4G. Signed-off-by: Gerd Hoffmann Signed-off-by: Michael S. Tsirkin --- hw/i386/pc_piix.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4e0dae7981..acb9445362 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -61,6 +61,7 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; static bool has_pci_info; static bool has_acpi_build = true; static bool smbios_type1_defaults = true; +static bool gigabyte_align = true; /* PC hardware initialisation */ static void pc_init1(QEMUMachineInitArgs *args, @@ -107,8 +108,9 @@ static void pc_init1(QEMUMachineInitArgs *args, } if (args->ram_size >= 0xe0000000) { - above_4g_mem_size = args->ram_size - 0xe0000000; - below_4g_mem_size = 0xe0000000; + ram_addr_t lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000; + above_4g_mem_size = args->ram_size - lowmem; + below_4g_mem_size = lowmem; } else { above_4g_mem_size = 0; below_4g_mem_size = args->ram_size; @@ -245,6 +247,7 @@ static void pc_init_pci(QEMUMachineInitArgs *args) static void pc_compat_1_7(QEMUMachineInitArgs *args) { smbios_type1_defaults = false; + gigabyte_align = false; } static void pc_compat_1_6(QEMUMachineInitArgs *args) -- cgit v1.2.3