From afcc3cdfc4f6291ae6cb803339c794029bf6c99a Mon Sep 17 00:00:00 2001 From: ths Date: Wed, 6 Jun 2007 16:26:14 +0000 Subject: Use the correct PCI IDs for Malta. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2945 c046a42c-6fe2-441c-8c8c-71466251a162 --- hw/ide.c | 39 +++++++++++++++++++++++++++++++++++++++ hw/mips_malta.c | 4 ++-- hw/pc.c | 2 +- hw/usb-uhci.c | 38 +++++++++++++++++++++++++++++++++++++- hw/usb.h | 3 ++- vl.h | 2 ++ 6 files changed, 83 insertions(+), 5 deletions(-) diff --git a/hw/ide.c b/hw/ide.c index 03875ce9ae..c4fabe6a64 100644 --- a/hw/ide.c +++ b/hw/ide.c @@ -376,6 +376,7 @@ typedef struct IDEState { #define IDE_TYPE_PIIX3 0 #define IDE_TYPE_CMD646 1 +#define IDE_TYPE_PIIX4 2 /* CMD646 specific */ #define MRDMODE 0x71 @@ -2875,6 +2876,44 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d); } +/* hd_table must contain 4 block drivers */ +/* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */ +void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, + qemu_irq *pic) +{ + PCIIDEState *d; + uint8_t *pci_conf; + + /* register a function 1 of PIIX4 */ + d = (PCIIDEState *)pci_register_device(bus, "PIIX4 IDE", + sizeof(PCIIDEState), + devfn, + NULL, NULL); + d->type = IDE_TYPE_PIIX4; + + pci_conf = d->dev.config; + pci_conf[0x00] = 0x86; // Intel + pci_conf[0x01] = 0x80; + pci_conf[0x02] = 0x11; + pci_conf[0x03] = 0x71; + pci_conf[0x09] = 0x80; // legacy ATA mode + pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE + pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage + pci_conf[0x0e] = 0x00; // header_type + + piix3_reset(d); + + pci_register_io_region((PCIDevice *)d, 4, 0x10, + PCI_ADDRESS_SPACE_IO, bmdma_map); + + ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]); + ide_init2(&d->ide_if[2], hd_table[2], hd_table[3], pic[15]); + ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6); + ide_init_ioport(&d->ide_if[2], 0x170, 0x376); + + register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d); +} + /***********************************************************/ /* MacIO based PowerPC IDE */ diff --git a/hw/mips_malta.c b/hw/mips_malta.c index fc84f7ca0f..9786023c30 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -830,8 +830,8 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device, /* Southbridge */ piix4_devfn = piix4_init(pci_bus, 80); - pci_piix3_ide_init(pci_bus, bs_table, piix4_devfn + 1, i8259); - usb_uhci_init(pci_bus, piix4_devfn + 2); + pci_piix4_ide_init(pci_bus, bs_table, piix4_devfn + 1, i8259); + usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100); eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ for (i = 0; i < 8; i++) { diff --git a/hw/pc.c b/hw/pc.c index 1cd5d4cff8..d38018679a 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -897,7 +897,7 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device, cmos_init(ram_size, boot_device, bs_table); if (pci_enabled && usb_enabled) { - usb_uhci_init(pci_bus, piix3_devfn + 2); + usb_uhci_piix3_init(pci_bus, piix3_devfn + 2); } if (pci_enabled && acpi_enabled) { diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c index 638b199c43..3936fe03f2 100644 --- a/hw/usb-uhci.c +++ b/hw/usb-uhci.c @@ -783,7 +783,7 @@ static void uhci_map(PCIDevice *pci_dev, int region_num, register_ioport_read(addr, 32, 1, uhci_ioport_readb, s); } -void usb_uhci_init(PCIBus *bus, int devfn) +void usb_uhci_piix3_init(PCIBus *bus, int devfn) { UHCIState *s; uint8_t *pci_conf; @@ -817,3 +817,39 @@ void usb_uhci_init(PCIBus *bus, int devfn) pci_register_io_region(&s->dev, 4, 0x20, PCI_ADDRESS_SPACE_IO, uhci_map); } + +void usb_uhci_piix4_init(PCIBus *bus, int devfn) +{ + UHCIState *s; + uint8_t *pci_conf; + int i; + + s = (UHCIState *)pci_register_device(bus, + "USB-UHCI", sizeof(UHCIState), + devfn, NULL, NULL); + pci_conf = s->dev.config; + pci_conf[0x00] = 0x86; + pci_conf[0x01] = 0x80; + pci_conf[0x02] = 0x12; + pci_conf[0x03] = 0x71; + pci_conf[0x08] = 0x01; // revision number + pci_conf[0x09] = 0x00; + pci_conf[0x0a] = 0x03; + pci_conf[0x0b] = 0x0c; + pci_conf[0x0e] = 0x00; // header_type + pci_conf[0x3d] = 4; // interrupt pin 3 + pci_conf[0x60] = 0x10; // release number + + for(i = 0; i < NB_PORTS; i++) { + qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach); + } + s->frame_timer = qemu_new_timer(vm_clock, uhci_frame_timer, s); + + uhci_reset(s); + + /* Use region 4 for consistency with real hardware. BSD guests seem + to rely on this. */ + pci_register_io_region(&s->dev, 4, 0x20, + PCI_ADDRESS_SPACE_IO, uhci_map); +} + diff --git a/hw/usb.h b/hw/usb.h index 02a7355e63..66662affe9 100644 --- a/hw/usb.h +++ b/hw/usb.h @@ -203,7 +203,8 @@ void usb_packet_complete(USBPacket *p); USBDevice *usb_hub_init(int nb_ports); /* usb-uhci.c */ -void usb_uhci_init(PCIBus *bus, int devfn); +void usb_uhci_piix3_init(PCIBus *bus, int devfn); +void usb_uhci_piix4_init(PCIBus *bus, int devfn); /* usb-ohci.c */ void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn); diff --git a/vl.h b/vl.h index c779541bd0..976af60e86 100644 --- a/vl.h +++ b/vl.h @@ -983,6 +983,8 @@ void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, int secondary_ide_enabled); void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, qemu_irq *pic); +void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, + qemu_irq *pic); int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq); /* cdrom.c */ -- cgit v1.2.3