From 798ac8b5e9f7a43fd8a0b1469bf7df27a9a04dd4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 11 Sep 2021 18:54:30 +0200 Subject: target/sparc: Restrict cpu_exec_interrupt() handler to sysemu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Restrict cpu_exec_interrupt() and its callees to sysemu. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Reviewed-by: Richard Henderson Message-Id: <20210911165434.531552-21-f4bug@amsat.org> Signed-off-by: Richard Henderson --- target/sparc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index da6b30ec74..5a8a4ce750 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -77,6 +77,7 @@ static void sparc_cpu_reset(DeviceState *dev) env->cache_control = 0; } +#ifndef CONFIG_USER_ONLY static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { if (interrupt_request & CPU_INTERRUPT_HARD) { @@ -96,6 +97,7 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) } return false; } +#endif /* !CONFIG_USER_ONLY */ static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info) { @@ -863,10 +865,10 @@ static const struct SysemuCPUOps sparc_sysemu_ops = { static const struct TCGCPUOps sparc_tcg_ops = { .initialize = sparc_tcg_init, .synchronize_from_tb = sparc_cpu_synchronize_from_tb, - .cpu_exec_interrupt = sparc_cpu_exec_interrupt, .tlb_fill = sparc_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY + .cpu_exec_interrupt = sparc_cpu_exec_interrupt, .do_interrupt = sparc_cpu_do_interrupt, .do_transaction_failed = sparc_cpu_do_transaction_failed, .do_unaligned_access = sparc_cpu_do_unaligned_access, -- cgit v1.2.3