From a31e7605dda326d8d42d5dadfa665838c2a9397f Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Mon, 9 Apr 2018 13:52:11 +0200 Subject: linux-user: fix microblaze get_sp_from_cpustate() get_sigframe() uses regs[1] and this is actual SP. Signed-off-by: Laurent Vivier Message-Id: <20180409115212.875-1-laurent@vivier.eu> --- linux-user/microblaze/target_signal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/microblaze/target_signal.h b/linux-user/microblaze/target_signal.h index de2b0f49d5..642865f12e 100644 --- a/linux-user/microblaze/target_signal.h +++ b/linux-user/microblaze/target_signal.h @@ -23,7 +23,7 @@ typedef struct target_sigaltstack { static inline abi_ulong get_sp_from_cpustate(CPUMBState *state) { - return state->regs[14]; + return state->regs[1]; } -- cgit v1.2.3 From 947aeab311adcaac1e082ddcf811504ea54529a5 Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Mon, 9 Apr 2018 13:52:12 +0200 Subject: linux-user: add microblaze/microblazeel magic numbers in qemu-binfmt-conf.sh Signed-off-by: Laurent Vivier Message-Id: <20180409115212.875-2-laurent@vivier.eu> --- scripts/qemu-binfmt-conf.sh | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh index f39ad344fc..7ab7435fbd 100755 --- a/scripts/qemu-binfmt-conf.sh +++ b/scripts/qemu-binfmt-conf.sh @@ -1,10 +1,10 @@ #!/bin/sh -# enable automatic i386/ARM/M68K/MIPS/SPARC/PPC/s390/HPPA/Xtensa +# enable automatic i386/ARM/M68K/MIPS/SPARC/PPC/s390/HPPA/Xtensa/microblaze # program execution by the kernel qemu_target_list="i386 i486 alpha arm armeb sparc32plus ppc ppc64 ppc64le m68k \ mips mipsel mipsn32 mipsn32el mips64 mips64el \ -sh4 sh4eb s390x aarch64 aarch64_be hppa riscv32 riscv64 xtensa xtensaeb" +sh4 sh4eb s390x aarch64 aarch64_be hppa riscv32 riscv64 xtensa xtensaeb microblaze microblazeel" i386_magic='\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00' i386_mask='\xff\xff\xff\xff\xff\xfe\xfe\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff' @@ -116,6 +116,14 @@ xtensaeb_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\ xtensaeb_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' xtensaeb_family=xtensaeb +microblaze_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\xba\xab' +microblaze_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff' +microblaze_family=microblaze + +microblazeel_magic='\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\xab\xba' +microblazeel_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff' +microblazeel_family=microblazeel + qemu_get_family() { cpu=${HOST_ARCH:-$(uname -m)} case "$cpu" in -- cgit v1.2.3 From 46a1ee4f397ffd305da95fb65dc73be49667ff6d Mon Sep 17 00:00:00 2001 From: James Cowgill Date: Thu, 15 Mar 2018 15:13:48 +0000 Subject: linux-user: implement HWCAP bits on MIPS Add support for the two currently defined HWCAP bits on MIPS - R6 and MSA. Buglink: https://bugs.launchpad.net/qemu/+bug/1754372 Signed-off-by: James Cowgill Reviewed-by: Laurent Vivier Message-Id: <20180315151348.6451-1-james.cowgill@mips.com> Signed-off-by: Laurent Vivier --- linux-user/elfload.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 23e34957f9..c77ed1bb01 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -882,6 +882,30 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *e #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 +/* See arch/mips/include/uapi/asm/hwcap.h. */ +enum { + HWCAP_MIPS_R6 = (1 << 0), + HWCAP_MIPS_MSA = (1 << 1), +}; + +#define ELF_HWCAP get_elf_hwcap() + +static uint32_t get_elf_hwcap(void) +{ + MIPSCPU *cpu = MIPS_CPU(thread_cpu); + uint32_t hwcaps = 0; + +#define GET_FEATURE(flag, hwcap) \ + do { if (cpu->env.insn_flags & (flag)) { hwcaps |= hwcap; } } while (0) + + GET_FEATURE(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6); + GET_FEATURE(ASE_MSA, HWCAP_MIPS_MSA); + +#undef GET_FEATURE + + return hwcaps; +} + #endif /* TARGET_MIPS */ #ifdef TARGET_MICROBLAZE -- cgit v1.2.3