From 2ae72bce02abe962dc0c11d40f2f872378ccd5de Mon Sep 17 00:00:00 2001 From: blueswir1 Date: Sun, 17 Aug 2008 08:33:47 +0000 Subject: Correct 32bit carry flag for add instruction (Igor Kovalenko) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-sparc/translate.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 44290637bc..6315218375 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -349,16 +349,19 @@ static inline void gen_cc_NZ_xcc(TCGv dst) */ static inline void gen_cc_C_add_icc(TCGv dst, TCGv src1) { - TCGv r_temp; + TCGv r_temp1, r_temp2; int l1; l1 = gen_new_label(); - r_temp = tcg_temp_new(TCG_TYPE_TL); - tcg_gen_andi_tl(r_temp, dst, 0xffffffffULL); - tcg_gen_brcond_tl(TCG_COND_GEU, dst, src1, l1); + r_temp1 = tcg_temp_new(TCG_TYPE_TL); + r_temp2 = tcg_temp_new(TCG_TYPE_TL); + tcg_gen_andi_tl(r_temp1, dst, 0xffffffffULL); + tcg_gen_andi_tl(r_temp2, src1, 0xffffffffULL); + tcg_gen_brcond_tl(TCG_COND_GEU, r_temp1, r_temp2, l1); tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_CARRY); gen_set_label(l1); - tcg_temp_free(r_temp); + tcg_temp_free(r_temp1); + tcg_temp_free(r_temp2); } #ifdef TARGET_SPARC64 -- cgit v1.2.3