From 2a5a9abd4bc45e2f4c62c77e07aebe53608c6915 Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Mon, 6 Jun 2016 16:59:28 +0100 Subject: target-arm: Add the HSTR_EL2 register Add the Hypervisor System Trap Register for EL2. This register is used early in the Linux boot and without it the kernel aborts with a "Synchronous Abort" error. Signed-off-by: Alistair Francis Message-id: ea5aae4b10283de4705b864fe9d4bd2eaddaacae.1463174342.git.alistair.francis@xilinx.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/cpu.h | 1 + target-arm/helper.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index c741b53ad4..afb60ee4f3 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -278,6 +278,7 @@ typedef struct CPUARMState { uint64_t far_el[4]; }; uint64_t hpfar_el2; + uint64_t hstr_el2; union { /* Translation result. */ struct { uint64_t _unused_par_0; diff --git a/target-arm/helper.c b/target-arm/helper.c index e3ea26f8c8..9a6ff2e2ba 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3471,6 +3471,9 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, .access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "HSTR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 3, + .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL }; @@ -3706,6 +3709,10 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, + { .name = "HSTR_EL2", .state = ARM_CP_STATE_BOTH, + .cp = 15, .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 3, + .access = PL2_RW, + .fieldoffset = offsetof(CPUARMState, cp15.hstr_el2) }, REGINFO_SENTINEL }; -- cgit v1.2.3