| Age | Commit message (Expand) | Author |
|---|
| 2024-05-06 | tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff | Richard Henderson |
| 2024-05-06 | tcg/i386: Simplify immediate 8-bit logical vector shifts | Richard Henderson |
| 2024-02-03 | tcg/i386: Use TEST r,r to test 8/16/32 bits | Paolo Bonzini |
| 2024-02-03 | tcg/i386: Improve TSTNE/TESTEQ vs powers of two | Richard Henderson |
| 2024-02-03 | tcg/i386: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
| 2024-02-03 | tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp | Richard Henderson |
| 2024-02-03 | tcg/i386: Pass x86 condition codes to tcg_out_cmov | Richard Henderson |
| 2024-02-03 | tcg: Add TCGConst argument to tcg_target_const_match | Richard Henderson |
| 2024-02-03 | tcg: Introduce TCG_TARGET_HAS_tst | Richard Henderson |
| 2024-01-11 | tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates | Paolo Bonzini |
| 2024-01-11 | tcg/i386: convert add/sub of 128 to sub/add of -128 | Paolo Bonzini |
| 2023-11-06 | tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} | Richard Henderson |
| 2023-11-06 | tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64} | Richard Henderson |
| 2023-10-22 | tcg/i386: Use tcg_use_softmmu | Richard Henderson |
| 2023-10-07 | tcg: Correct invalid mentions of 'softmmu' by 'system-mode' | Philippe Mathieu-Daudé |
| 2023-09-16 | tcg: Add tcg_out_tb_start backend hook | Richard Henderson |
| 2023-09-15 | tcg: pass vece to tcg_target_const_match() | Jiajie Chen |
| 2023-08-24 | tcg/i386: Implement negsetcond_* | Richard Henderson |
| 2023-08-24 | tcg/i386: Use shift in tcg_out_setcond | Richard Henderson |
| 2023-08-24 | tcg/i386: Clear dest first in tcg_out_setcond if possible | Richard Henderson |
| 2023-08-24 | tcg/i386: Use CMP+SBB in tcg_out_setcond | Richard Henderson |
| 2023-08-24 | tcg/i386: Merge tcg_out_movcond{32,64} | Richard Henderson |
| 2023-08-24 | tcg/i386: Merge tcg_out_setcond{32,64} | Richard Henderson |
| 2023-08-24 | tcg/i386: Merge tcg_out_brcond{32,64} | Richard Henderson |
| 2023-08-24 | tcg: Introduce negsetcond opcodes | Richard Henderson |
| 2023-08-24 | tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 | Richard Henderson |
| 2023-08-24 | tcg/i386: Allow immediate as input to deposit_* | Richard Henderson |
| 2023-08-24 | tcg/i386: Drop BYTEH deposits for 64-bit | Richard Henderson |
| 2023-08-12 | tcg/i386: Output %gs prefix in tcg_out_vex_opc | Richard Henderson |
| 2023-07-23 | tcg/{i386, s390x}: Add earlyclobber to the op_add2's first output | Ilya Leoshkevich |
| 2023-06-05 | tcg: Split out tcg-target-reg-bits.h | Richard Henderson |
| 2023-06-05 | tcg: Add tlb_fast_offset to TCGContext | Richard Henderson |
| 2023-05-30 | tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS | Richard Henderson |
| 2023-05-30 | tcg/i386: Support 128-bit load/store | Richard Henderson |
| 2023-05-23 | tcg/i386: Use host/cpuinfo.h | Richard Henderson |
| 2023-05-16 | tcg: Add tlb_dyn_max_bits to TCGContext | Richard Henderson |
| 2023-05-16 | tcg: Add page_bits and page_mask to TCGContext | Richard Henderson |
| 2023-05-16 | tcg/i386: Remove TARGET_LONG_BITS, TCG_TYPE_TL | Richard Henderson |
| 2023-05-16 | tcg/i386: Adjust type of tlb_mask | Richard Henderson |
| 2023-05-16 | tcg/i386: Conditionalize tcg_out_extu_i32_i64 | Richard Henderson |
| 2023-05-16 | tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32 | Richard Henderson |
| 2023-05-16 | tcg: Split INDEX_op_qemu_{ld,st}* for guest address size | Richard Henderson |
| 2023-05-16 | tcg/i386: Use atom_and_align_for_opc | Richard Henderson |
| 2023-05-16 | tcg: Add INDEX_op_qemu_{ld,st}_i128 | Richard Henderson |
| 2023-05-16 | tcg: Introduce tcg_target_has_memory_bswap | Richard Henderson |
| 2023-05-16 | tcg/i386: Use full load/store helpers in user-only mode | Richard Henderson |
| 2023-05-16 | tcg/i386: Add have_atomic16 | Richard Henderson |
| 2023-05-16 | tcg: Unify helper_{be,le}_{ld,st}* | Richard Henderson |
| 2023-05-16 | tcg/i386: Set P_REXW in tcg_out_addi_ptr | Richard Henderson |
| 2023-05-11 | tcg/i386: Convert tcg_out_qemu_st_slow_path | Richard Henderson |
