slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2019-11-19	Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging	Peter Maydell
2019-11-19	target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY	Richard Henderson
2019-11-19	target/arm: Relax r13 restriction for ldrex/strex for v8.0	Richard Henderson
2019-11-19	target/arm: Do not reject rt == rt2 for strexd	Richard Henderson
2019-11-19	target/arm: Merge arm_cpu_vq_map_next_smaller into sole caller	Richard Henderson
2019-11-19	hw/i386: Move save_tsc_khz from PCMachineClass to X86MachineClass	Liam Merwick
2019-11-19	target/i386: Export TAA_NO bit to guests	Pawan Gupta
2019-11-19	target/i386: add PSCHANGE_NO bit for the ARCH_CAPABILITIES MSR	Paolo Bonzini
2019-11-18	Merge remote-tracking branch 'remotes/vivier2/tags/ppc-for-4.2-pull-request' ...	Peter Maydell
2019-11-18	spapr/kvm: Set default cpu model for all machine classes	David Gibson
2019-11-14	target/riscv: Remove atomic accesses to MIP CSR	Alistair Francis
2019-11-14	remove unnecessary ifdef TARGET_RISCV64	hiroyuki.obinata
2019-11-12	target/microblaze: Plug temp leak around eval_cond_jmp()	Edgar E. Iglesias
2019-11-12	target/microblaze: Plug temp leaks with delay slot setup	Edgar E. Iglesias
2019-11-12	target/microblaze: Plug temp leaks for loads/stores	Edgar E. Iglesias
2019-11-06	target/sparc: Define an enumeration for accessing env->regwptr	Richard Henderson
2019-11-01	target/arm: Allow reading flags from FPSCR for M-profile	Christophe Lyon
2019-11-01	target/arm/kvm: host cpu: Add support for sve<N> properties	Andrew Jones
2019-11-01	target/arm/cpu64: max cpu: Support sve properties with KVM	Andrew Jones
2019-11-01	target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features	Andrew Jones
2019-11-01	target/arm/kvm64: max cpu: Enable SVE when available	Andrew Jones
2019-11-01	target/arm/kvm64: Add kvm_arch_get/put_sve	Andrew Jones
2019-11-01	target/arm/cpu64: max cpu: Introduce sve<N> properties	Andrew Jones
2019-11-01	target/arm: Allow SVE to be disabled via a CPU property	Andrew Jones
2019-11-01	target/arm/monitor: Introduce qmp_query_cpu_model_expansion	Andrew Jones
2019-10-30	Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-plugins-281019-4'...	Peter Maydell
2019-10-29	Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191028' into staging	Peter Maydell
2019-10-28	target/riscv: PMP violation due to wrong size parameter	Dayeol Lee
2019-10-28	target/openrisc: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/xtensa: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/sparc: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/riscv: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/alpha: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/m68k: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/hppa: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/i386: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/sh4: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/ppc: fetch code with translator_ld	Emilio G. Cota
2019-10-28	target/arm: fetch code with translator_ld	Emilio G. Cota
2019-10-28	cputlb: ensure _cmmu helper functions follow the naming standard	Alex Bennée
2019-10-28	target/riscv: Make the priv register writable by GDB	Jonathan Behrens
2019-10-28	target/riscv: Expose "priv" register for GDB for reads	Jonathan Behrens
2019-10-28	target/riscv: Tell gdbstub the correct number of CSRs	Jonathan Behrens
2019-10-28	linux-user/riscv: Propagate fault address	Giuseppe Musacchio
2019-10-28	RISC-V: Implement cpu_do_transaction_failed	Palmer Dabbelt
2019-10-28	RISC-V: Handle bus errors in the page table walker	Palmer Dabbelt
2019-10-28	riscv: Skip checking CSR privilege level in debugger mode	Bin Meng
2019-10-28	cputlb: ensure _cmmu helper functions follow the naming standard	Alex Bennée
2019-10-26	i386: implement IGNNE	Paolo Bonzini
2019-10-26	target/i386: introduce cpu_set_fpus	Paolo Bonzini